FD.io VPP  v18.07-rc0-415-g6c78436
Vector Packet Processing
pci_config_type0_regs_t Struct Reference
+ Collaboration diagram for pci_config_type0_regs_t:

Data Fields

pci_config_header_t header
 
u32 base_address [6]
 
u16 cardbus_cis
 
u16 subsystem_vendor_id
 
u16 subsystem_id
 
u32 rom_address
 
u8 first_capability_offset
 
u8 pad_0x35 [(0x3c)-(0x35)]
 Padding. More...
 
u8 interrupt_line
 
u8 interrupt_pin
 
u8 min_grant
 
u8 max_latency
 
u8 capability_data [0]
 

Detailed Description

Definition at line 245 of file pci_config.h.

Field Documentation

u32 pci_config_type0_regs_t::base_address[6]

Definition at line 255 of file pci_config.h.

u8 pci_config_type0_regs_t::capability_data[0]

Definition at line 275 of file pci_config.h.

u16 pci_config_type0_regs_t::cardbus_cis

Definition at line 257 of file pci_config.h.

u8 pci_config_type0_regs_t::first_capability_offset

Definition at line 267 of file pci_config.h.

pci_config_header_t pci_config_type0_regs_t::header

Definition at line 247 of file pci_config.h.

u8 pci_config_type0_regs_t::interrupt_line

Definition at line 270 of file pci_config.h.

u8 pci_config_type0_regs_t::interrupt_pin

Definition at line 271 of file pci_config.h.

u8 pci_config_type0_regs_t::max_latency

Definition at line 273 of file pci_config.h.

u8 pci_config_type0_regs_t::min_grant

Definition at line 272 of file pci_config.h.

u8 pci_config_type0_regs_t::pad_0x35[(0x3c)-(0x35)]

Padding.

Definition at line 268 of file pci_config.h.

u32 pci_config_type0_regs_t::rom_address

Definition at line 262 of file pci_config.h.

u16 pci_config_type0_regs_t::subsystem_id

Definition at line 260 of file pci_config.h.

u16 pci_config_type0_regs_t::subsystem_vendor_id

Definition at line 259 of file pci_config.h.


The documentation for this struct was generated from the following file: