Definition at line 284 of file pci_config.h.
pci_config_type1_regs_t::CLIB_PAD_FROM_TO |
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pci_config_type1_regs_t::CLIB_PAD_FROM_TO |
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u32 pci_config_type1_regs_t::base_address[2] |
u16 pci_config_type1_regs_t::bridge_control |
u8 pci_config_type1_regs_t::capability_data[0] |
u8 pci_config_type1_regs_t::capability_list_offset |
u8 pci_config_type1_regs_t::io_base |
u16 pci_config_type1_regs_t::io_base_upper_16bits |
u8 pci_config_type1_regs_t::io_limit |
u16 pci_config_type1_regs_t::io_limit_upper_16bits |
u16 pci_config_type1_regs_t::memory_base |
u16 pci_config_type1_regs_t::memory_limit |
u16 pci_config_type1_regs_t::prefetchable_memory_base |
u32 pci_config_type1_regs_t::prefetchable_memory_base_upper_32bits |
u16 pci_config_type1_regs_t::prefetchable_memory_limit |
u32 pci_config_type1_regs_t::prefetchable_memory_limit_upper_32bits |
u8 pci_config_type1_regs_t::primary_bus |
u32 pci_config_type1_regs_t::rom_address |
u8 pci_config_type1_regs_t::secondary_bus |
u8 pci_config_type1_regs_t::secondary_bus_latency_timer |
u16 pci_config_type1_regs_t::secondary_status |
u8 pci_config_type1_regs_t::subordinate_bus |
The documentation for this struct was generated from the following file: