31 #define SSE2_QOS_DEBUG_ERROR(msg, args...) \ 32 fformat(stderr, msg "\n", ##args); 34 #define SSE2_QOS_DEBUG_INFO(msg, args...) \ 35 fformat(stderr, msg "\n", ##args); 38 #define SSE2_QOS_TR_ERR(TpParms...) 42 #define SSE2_QOS_TR_INFO(TpParms...) 45 #define MIN(x,y) (((x)<(y))?(x):(y)) 49 #define MAX(x,y) (((x)>(y))?(x):(y)) 52 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AH_OFFSET 0 53 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AH_MASK 8 54 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AH_SHIFT 24 56 #define IPE_POLICER_FULL_WRITE_REQUEST_TYPE_OFFSET 2 57 #define IPE_POLICER_FULL_WRITE_REQUEST_TYPE_MASK 2 58 #define IPE_POLICER_FULL_WRITE_REQUEST_TYPE_SHIFT 10 60 #define IPE_POLICER_FULL_WRITE_REQUEST_CMD_OFFSET 3 61 #define IPE_POLICER_FULL_WRITE_REQUEST_CMD_MASK 2 62 #define IPE_POLICER_FULL_WRITE_REQUEST_CMD_SHIFT 0 64 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AL_OFFSET 4 65 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AL_MASK 32 66 #define IPE_POLICER_FULL_WRITE_REQUEST_M40AL_SHIFT 0 68 #define IPE_POLICER_FULL_WRITE_REQUEST_RFC_OFFSET 8 69 #define IPE_POLICER_FULL_WRITE_REQUEST_RFC_MASK 2 70 #define IPE_POLICER_FULL_WRITE_REQUEST_RFC_SHIFT 30 72 #define IPE_POLICER_FULL_WRITE_REQUEST_AN_OFFSET 8 73 #define IPE_POLICER_FULL_WRITE_REQUEST_AN_MASK 1 74 #define IPE_POLICER_FULL_WRITE_REQUEST_AN_SHIFT 29 76 #define IPE_POLICER_FULL_WRITE_REQUEST_REXP_OFFSET 8 77 #define IPE_POLICER_FULL_WRITE_REQUEST_REXP_MASK 4 78 #define IPE_POLICER_FULL_WRITE_REQUEST_REXP_SHIFT 22 80 #define IPE_POLICER_FULL_WRITE_REQUEST_ARM_OFFSET 9 81 #define IPE_POLICER_FULL_WRITE_REQUEST_ARM_MASK 11 82 #define IPE_POLICER_FULL_WRITE_REQUEST_ARM_SHIFT 11 84 #define IPE_POLICER_FULL_WRITE_REQUEST_PRM_OFFSET 10 85 #define IPE_POLICER_FULL_WRITE_REQUEST_PRM_MASK 11 86 #define IPE_POLICER_FULL_WRITE_REQUEST_PRM_SHIFT 0 88 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLE_OFFSET 12 89 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLE_MASK 5 90 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLE_SHIFT 27 92 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLM_OFFSET 12 93 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLM_MASK 7 94 #define IPE_POLICER_FULL_WRITE_REQUEST_CBLM_SHIFT 20 96 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLE_OFFSET 13 97 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLE_MASK 5 98 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLE_SHIFT 15 100 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLM_OFFSET 14 101 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLM_MASK 7 102 #define IPE_POLICER_FULL_WRITE_REQUEST_EBLM_SHIFT 8 104 #define IPE_POLICER_FULL_WRITE_REQUEST_CB_OFFSET 16 105 #define IPE_POLICER_FULL_WRITE_REQUEST_CB_MASK 31 106 #define IPE_POLICER_FULL_WRITE_REQUEST_CB_SHIFT 0 108 #define IPE_POLICER_FULL_WRITE_REQUEST_EB_OFFSET 20 109 #define IPE_POLICER_FULL_WRITE_REQUEST_EB_MASK 31 110 #define IPE_POLICER_FULL_WRITE_REQUEST_EB_SHIFT 0 112 #define IPE_RFC_RFC2697 0x00000000 113 #define IPE_RFC_RFC2698 0x00000001 114 #define IPE_RFC_RFC4115 0x00000002 115 #define IPE_RFC_MEF5CF1 0x00000003 120 #define SSE2_QOS_POLICER_FIXED_PKT_SIZE 256 123 #define SSE2_QOS_POL_TICKS_PER_SEC 1000LL 128 #define SSE2_QOS_POL_DEF_BURST_BYTE 100 134 #define SSE2_QOS_POL_MIN_BURST_BYTE 9*1024 141 #define SSE2_QOS_POL_ALLOW_NEGATIVE 1 145 #define SSE2_QOS_POL_COMM_BKT_MAX \ 146 (1<<IPE_POLICER_FULL_WRITE_REQUEST_CB_MASK) 147 #define SSE2_QOS_POL_EXTD_BKT_MAX \ 148 (1<<IPE_POLICER_FULL_WRITE_REQUEST_EB_MASK) 150 #define SSE2_QOS_POL_RATE_EXP_SIZE \ 151 (IPE_POLICER_FULL_WRITE_REQUEST_REXP_MASK) 152 #define SSE2_QOS_POL_RATE_EXP_MAX ((1<<SSE2_QOS_POL_RATE_EXP_SIZE) - 1) 153 #define SSE2_QOS_POL_AVG_RATE_MANT_SIZE \ 154 (IPE_POLICER_FULL_WRITE_REQUEST_ARM_MASK) 155 #define SSE2_QOS_POL_AVG_RATE_MANT_MAX \ 156 ((1<< SSE2_QOS_POL_AVG_RATE_MANT_SIZE) - 1) 157 #define SSE2_QOS_POL_AVG_RATE_MAX \ 158 (SSE2_QOS_POL_AVG_RATE_MANT_MAX << \ 159 SSE2_QOS_POL_RATE_EXP_MAX) 161 #define SSE2_QOS_POL_PEAK_RATE_MANT_SIZE \ 162 (IPE_POLICER_FULL_WRITE_REQUEST_PRM_MASK) 163 #define SSE2_QOS_POL_PEAK_RATE_MANT_MAX \ 164 ((1<<SSE2_QOS_POL_PEAK_RATE_MANT_SIZE) - 1) 165 #define SSE2_QOS_POL_PEAK_RATE_MAX \ 166 (SSE2_QOS_POL_PEAK_RATE_MANT_MAX << \ 167 SSE2_QOS_POL_RATE_EXP_MAX) 169 #define SSE2_QOS_POL_COMM_BKT_LIMIT_MANT_SIZE \ 170 (IPE_POLICER_FULL_WRITE_REQUEST_CBLM_MASK) 171 #define SSE2_QOS_POL_COMM_BKT_LIMIT_MANT_MAX \ 172 ((1<<SSE2_QOS_POL_COMM_BKT_LIMIT_MANT_SIZE) - 1) 173 #define SSE2_QOS_POL_COMM_BKT_LIMIT_EXP_SIZE \ 174 (IPE_POLICER_FULL_WRITE_REQUEST_CBLE_MASK) 175 #define SSE2_QOS_POL_COMM_BKT_LIMIT_EXP_MAX \ 176 ((1<<SSE2_QOS_POL_COMM_BKT_LIMIT_EXP_SIZE) - 1) 177 #define SSE2_QOS_POL_COMM_BKT_LIMIT_MAX \ 178 ((uint64_t)SSE2_QOS_POL_COMM_BKT_LIMIT_MANT_MAX << \ 179 (uint64_t)SSE2_QOS_POL_COMM_BKT_LIMIT_EXP_MAX) 181 #define SSE2_QOS_POL_EXTD_BKT_LIMIT_MANT_SIZE \ 182 (IPE_POLICER_FULL_WRITE_REQUEST_EBLM_MASK) 183 #define SSE2_QOS_POL_EXTD_BKT_LIMIT_MANT_MAX \ 184 ((1<<SSE2_QOS_POL_EXTD_BKT_LIMIT_MANT_SIZE) - 1) 185 #define SSE2_QOS_POL_EXTD_BKT_LIMIT_EXP_SIZE \ 186 (IPE_POLICER_FULL_WRITE_REQUEST_EBLE_MASK) 187 #define SSE2_QOS_POL_EXTD_BKT_LIMIT_EXP_MAX \ 188 ((1<<SSE2_QOS_POL_EXTD_BKT_LIMIT_EXP_SIZE) - 1) 189 #define SSE2_QOS_POL_EXT_BKT_LIMIT_MAX \ 190 ((uint64_t)SSE2_QOS_POL_EXTD_BKT_LIMIT_MANT_MAX << \ 191 (uint64_t)SSE2_QOS_POL_EXTD_BKT_LIMIT_EXP_MAX) 202 #define RATE256 (256114688000LL / 8LL / SSE2_QOS_POL_TICKS_PER_SEC) 203 #define RATE128 (128057344000LL / 8LL / SSE2_QOS_POL_TICKS_PER_SEC) 204 #define RATE64 ( 64028672000LL / 8LL / SSE2_QOS_POL_TICKS_PER_SEC) 206 #define RATE_OVER256_UNIT 8LL 207 #define RATE_128TO256_UNIT 4LL 208 #define RATE_64TO128_UNIT 2LL 212 uint64_t denominator,
213 uint64_t *rounded_value,
218 if (denominator == 0) {
224 switch (round_type) {
226 *rounded_value = ((numerator + (denominator >> 1)) / denominator);
230 *rounded_value = (numerator / denominator);
231 if ((*rounded_value * denominator) < numerator) {
237 *rounded_value = (numerator / denominator);
254 uint64_t numer, denom, rnd_value;
270 numer = (uint64_t)(cfg->
rb.
kbps.cir_kbps);
281 numer = (uint64_t)(cfg->
rb.
kbps.eir_kbps);
293 "max supported value (%u)", cir_hw,
302 "max supported value (%u). Capping it to the max. " 311 if ((cfg->
rb.
kbps.cir_kbps == 0) && cfg->
rb.
kbps.cb_bytes) {
317 if ((cfg->
rb.
kbps.eir_kbps == 0) &&
324 if (cfg->
rb.
kbps.eir_kbps &&
358 while (temp_exp <= max_exp_value) {
359 if (temp_mant <= max_mant_value) {
367 temp_mant = rnd_value;
370 if (temp_exp > max_exp_value) {
375 temp_mant = max_mant_value;
390 uint32_t cir_hw, eir_hw, hi_mant, hi_rate, cir_rnded, eir_rnded, eir_kbps;
391 uint64_t numer, denom, rnd_value;
399 numer = (uint64_t)(cfg->
rb.
kbps.cir_kbps);
410 if (cfg->
rb.
kbps.cir_kbps && (cir_hw == 0)) {
420 eir_kbps = cfg->
rb.
kbps.cir_kbps;
422 eir_kbps = cfg->
rb.
kbps.eir_kbps - cfg->
rb.
kbps.cir_kbps;
424 eir_kbps = cfg->
rb.
kbps.eir_kbps;
427 numer = (uint64_t)eir_kbps;
438 if (eir_kbps && (eir_hw == 0)) {
448 if (cir_hw > eir_hw) {
454 if ((cir_hw == 0) && (eir_hw == 0)) {
472 if (hi_rate == eir_hw) {
512 "kbps (mant: %u, exp: %u, rate: %u bytes/tick)",
517 "kbps (mant: %u, exp: %u, rate: %u bytes/tick)",
548 return (bkt_max - 1);
549 }
else if (rate_hw <=
RATE128) {
551 }
else if (rate_hw <=
RATE256) {
582 }
else if (rate_hw <=
RATE128) {
584 }
else if (rate_hw <=
RATE256) {
601 uint64_t bkt_max=max_bkt_value;
602 uint64_t bkt_limit_max;
604 uint64_t temp_bkt_value;
606 bkt_limit_max = ((uint64_t)max_mant_value<<(uint64_t)max_exp_value);
608 bkt_max=
MIN(bkt_max, bkt_limit_max);
617 if (cfg_burst > bkt_max) {
619 "supported value 0x%llx bytes. Capping it to the " 620 "max", cfg_burst, bkt_max);
622 (uint)cfg_burst, (uint)bkt_max);
632 "supported value %u bytes. Rounding it up to " 647 rnd_burst = ((uint64_t)(*mant) << (uint64_t)(*exp));
649 *bkt_value = (
uint32_t)temp_bkt_value;
670 rate_hw, &temp_exp, &temp_mant, &bkt_value);
672 "exp: %u, rnded: 0x%llx cb:%u bytes",
673 cfg->
rb.
kbps.cb_bytes, temp_mant, temp_exp,
674 ((uint64_t)temp_mant << (uint64_t)temp_exp), bkt_value);
694 "exp: %u, rnded: 0x%llx bytes",
705 eb_bytes = cfg->
rb.
kbps.cb_bytes + cfg->
rb.
kbps.eb_bytes;
707 eb_bytes = cfg->
rb.
kbps.eb_bytes - cfg->
rb.
kbps.cb_bytes;
709 eb_bytes = cfg->
rb.
kbps.eb_bytes;
717 rate_hw, &temp_exp, &temp_mant, &bkt_value);
720 "exp: %u, rnded: 0x%llx eb:%u bytes",
721 cfg->
rb.
kbps.eb_bytes, temp_mant, temp_exp,
722 ((uint64_t)temp_mant << (uint64_t)temp_exp), bkt_value);
791 uint64_t numer, rnd_value = 0;
793 numer = (uint64_t)((uint64_t)rate_pps *
805 uint64_t numer, rnd_value = 0;
810 numer = (uint64_t)((uint64_t)burst_ms * (uint64_t)rate_kbps);
862 #if defined (INTERNAL_SS) || defined (X86) 875 return (uint64_t) cpu_freq;
893 double internal_cir_bytes_per_period;
894 double internal_pir_bytes_per_period;
898 uint32_t __attribute__((unused)) orig_current_limit = *current_limit;
905 internal_cir_bytes_per_period = (double)cir_rate / period;
906 internal_pir_bytes_per_period = (double)pir_rate / period;
916 #define MAX_RATE_SHIFT 10 917 max =
MAX(*current_limit, *extended_limit);
920 scale_shift = __builtin_clz(max);
922 scale_amount = 1 << scale_shift;
923 *scale = scale_shift;
926 *current_limit = *current_limit << scale_shift;
927 *extended_limit = *extended_limit << scale_shift;
930 internal_cir_bytes_per_period = internal_cir_bytes_per_period * ((double)scale_amount);
931 internal_pir_bytes_per_period = internal_pir_bytes_per_period * ((double)scale_amount);
935 if (internal_cir_bytes_per_period < 1.0) {
936 internal_cir_bytes_per_period = 1.0;
938 if (internal_pir_bytes_per_period < 1.0) {
939 internal_pir_bytes_per_period = 1.0;
942 *cir_bytes_per_period = (
uint32_t)internal_cir_bytes_per_period;
943 *pir_bytes_per_period = (
uint32_t)internal_pir_bytes_per_period;
946 #ifdef PRINT_X86_POLICE_PARAMS 948 uint64_t effective_BPS;
953 effective_BPS = (((uint64_t) (*cir_bytes_per_period * (uint64_t)period)) >> *scale );
955 printf(
"hz=%llu, cir_rate=%llu, limit=%u => " 956 "periods-per-sec=%d usec-per-period=%d => " 957 "scale=%d cir_BPP=%u, scaled_limit=%u => " 958 "effective BPS=%llu, accuracy=%f\n",
960 (
unsigned long long)hz,
961 (
unsigned long long)cir_rate,
965 (
uint32_t)(1000.0 * 1000.0 / period),
967 *cir_bytes_per_period,
970 (
unsigned long long)effective_BPS,
971 (
double)cir_rate / (
double)effective_BPS);
988 const int BYTES_PER_KBIT = (1000 / 8);
1002 cap = (cfg->
rb.
kbps.cb_bytes > 0xFFFFFFFF) ? 0xFFFFFFFF : cfg->
rb.
kbps.cb_bytes;
1004 cap = (cfg->
rb.
kbps.eb_bytes > 0xFFFFFFFF) ? 0xFFFFFFFF : cfg->
rb.
kbps.eb_bytes;
1007 if ((cfg->
rb.
kbps.cir_kbps == 0) && (cfg->
rb.
kbps.cb_bytes == 0) && (cfg->
rb.
kbps.eb_bytes == 0)) {
1025 if ((cfg->
rb.
kbps.cir_kbps == 0) ||
1026 (cfg->
rb.
kbps.eir_kbps != 0) ||
1027 ((cfg->
rb.
kbps.cb_bytes == 0) && (cfg->
rb.
kbps.eb_bytes == 0))) {
1033 (uint64_t)cfg->
rb.
kbps.cir_kbps * BYTES_PER_KBIT,
1052 if ((cfg->
rb.
kbps.cir_kbps == 0) || (cfg->
rb.
kbps.eir_kbps == 0) || (cfg->
rb.
kbps.eir_kbps < cfg->
rb.
kbps.cir_kbps) ||
1053 (cfg->
rb.
kbps.cb_bytes == 0) || (cfg->
rb.
kbps.eb_bytes == 0)) {
1059 (uint64_t)cfg->
rb.
kbps.cir_kbps * BYTES_PER_KBIT,
1060 (uint64_t)cfg->
rb.
kbps.eir_kbps * BYTES_PER_KBIT,
1113 kbps_cfg.
rb.
kbps.cir_kbps =
1115 kbps_cfg.
rb.
kbps.eir_kbps =
1132 #if !defined (INTERNAL_SS) && !defined (X86) 1141 phys->rfc = pol_hw.
rfc;
1175 #endif // if !defined (INTERNAL_SS) && !defined (X86) 1187 #if !defined (INTERNAL_SS) && !defined (X86) 1213 if ((hw ==
NULL) || (cfg ==
NULL)) {
1241 SSE2_QOS_POL_TICKS_PER_SEC)/1000;
1256 cfg->
rb.
kbps.eir_kbps = 0;
1272 "burst: 0x%llx bytes, eb burst: 0x%llx bytes",
1277 (uint)cfg->
rb.
kbps.cb_bytes, (uint)cfg->
rb.
kbps.eb_bytes);
1285 uint64_t numer, denom, rnd_value = 0;
1290 numer = (uint64_t)((uint64_t)rate_kbps * 1000LL);
1303 uint64_t numer, denom, rnd_value = 0;
1308 numer = burst_bytes * 8LL;
1309 denom = (uint64_t)rate_kbps;
1357 cfg->
rb.
pps.cir_pps =
1359 cfg->
rb.
pps.eir_pps =
static void sse2_qos_convert_pol_bucket_to_hw_fmt(policer_read_response_type_st *bkt, sse2_qos_pol_hw_params_st *hw_fmt)
uint32_t sse2_qos_convert_pps_to_kbps(uint32_t rate_pps)
#define SSE2_QOS_POL_AVG_RATE_MANT_MAX
#define SSE2_QOS_POL_MIN_BURST_BYTE
static void(BVT(clib_bihash)*h, BVT(clib_bihash_value)*v)
bad routing header type(not 4)") sr_error (NO_MORE_SEGMENTS
uint32_t sse2_qos_convert_burst_ms_to_bytes(uint32_t burst_ms, uint32_t rate_kbps)
uint8_t comm_bkt_limit_man
#define SSE2_QOS_DEBUG_ERROR(msg, args...)
trans_layer_rc sse2_pol_logical_2_physical(sse2_qos_pol_cfg_params_st *cfg, policer_read_response_type_st *phys)
#define SSE2_QOS_DEBUG_INFO(msg, args...)
uint64_t sse2_pol_get_bkt_value(uint64_t rate_hw, uint64_t byte_value)
union sse2_qos_pol_cfg_params_st_::@153 rb
#define SSE2_QOS_POLICER_FIXED_PKT_SIZE
uint32_t sse2_qos_convert_kbps_to_pps(uint32_t rate_kbps)
#define SSE2_QOS_TR_INFO(TpParms...)
#define SSE2_QOS_POL_TICKS_PER_SEC
static int compute_policer_params(uint64_t hz, uint64_t cir_rate, uint64_t pir_rate, uint32_t *current_limit, uint32_t *extended_limit, uint32_t *cir_bytes_per_period, uint32_t *pir_bytes_per_period, uint32_t *scale)
uint8_t extd_bkt_limit_exp
#define SSE2_QOS_POL_COMM_BKT_LIMIT_MANT_MAX
uint32_t sse2_qos_convert_burst_bytes_to_ms(uint64_t burst_bytes, uint32_t rate_kbps)
#define RATE_128TO256_UNIT
static cerrno sse2_qos_pol_round(uint64_t numerator, uint64_t denominator, uint64_t *rounded_value, sse2_qos_round_type_en round_type)
uint8_t comm_bkt_limit_exp
#define SSE2_QOS_POL_EXTD_BKT_LIMIT_MANT_MAX
trans_layer_rc x86_pol_compute_hw_params(sse2_qos_pol_cfg_params_st *cfg, policer_read_response_type_st *hw)
static void sse2_pol_rnd_burst_byte_fmt(uint64_t cfg_burst, uint16_t max_exp_value, uint16_t max_mant_value, uint32_t max_bkt_value, uint32_t rate_hw, uint8_t *exp, uint32_t *mant, uint32_t *bkt_value)
unsigned short int uint16_t
struct sse2_qos_pol_cfg_params_st_::@153::@154 kbps
#define SSE2_QOS_POL_COMM_BKT_LIMIT_EXP_MAX
struct sse2_qos_pol_cfg_params_st_::@153::@155 pps
#define SSE2_QOS_POL_RATE_EXP_MAX
uint64_t last_update_time
#define SSE2_QOS_POL_PEAK_RATE_MAX
#define SSE2_QOS_TR_ERR(TpParms...)
#define SSE2_QOS_POL_ALLOW_NEGATIVE
uint8_t extd_bkt_limit_man
#define RATE_OVER256_UNIT
#define RATE_64TO128_UNIT
static void sse2_qos_convert_value_to_exp_mant_fmt(uint64_t value, uint16_t max_exp_value, uint16_t max_mant_value, sse2_qos_round_type_en type, uint8_t *exp, uint32_t *mant)
static cerrno sse2_pol_convert_cfg_burst_to_hw(sse2_qos_pol_cfg_params_st *cfg, sse2_qos_pol_hw_params_st *hw)
#define SSE2_QOS_POL_DEF_BURST_BYTE
uint32_t cir_tokens_per_period
#define SSE2_QOS_POL_AVG_RATE_MAX
static cerrno sse2_pol_convert_hw_to_cfg_params(sse2_qos_pol_hw_params_st *hw, sse2_qos_pol_cfg_params_st *cfg)
#define SSE2_QOS_POL_EXTD_BKT_LIMIT_EXP_MAX
uint64_t sse2_pol_get_bkt_max(uint64_t rate_hw, uint64_t bkt_max)
static cerrno sse2_pol_convert_cfg_to_hw_params(sse2_qos_pol_cfg_params_st *cfg, sse2_qos_pol_hw_params_st *hw)
#define SSE2_QOS_POL_EXTD_BKT_MAX
#define POLICER_TICKS_PER_PERIOD
uint32_t pir_tokens_per_period
static cerrno sse2_pol_validate_cfg_params(sse2_qos_pol_cfg_params_st *cfg)
static cerrno sse2_pol_convert_cfg_rates_to_hw(sse2_qos_pol_cfg_params_st *cfg, sse2_qos_pol_hw_params_st *hw)
static uint64_t get_tsc_hz(void)
trans_layer_rc sse2_pol_compute_hw_params(sse2_qos_pol_cfg_params_st *cfg, sse2_qos_pol_hw_params_st *hw)
#define SSE2_QOS_POL_COMM_BKT_MAX
trans_layer_rc sse2_pol_physical_2_logical(policer_read_response_type_st *phys, sse2_qos_pol_cfg_params_st *cfg)
f64 os_cpu_clock_frequency(void)