43 struct rte_eth_dev_info dev_info;
48 if (hw_if_index == (
u32) ~ 0)
63 rte_eth_dev_info_get ((*xd)->device_index, &dev_info);
66 vlib_pci_addr_t pci_addr;
68 pci_addr.domain = dev_info.pci_dev->addr.domain;
69 pci_addr.bus = dev_info.pci_dev->addr.bus;
70 pci_addr.slot = dev_info.pci_dev->addr.devid;
71 pci_addr.function = dev_info.pci_dev->addr.function;
90 #define PCAP_DEF_PKT_TO_CAPTURE (100) 95 u8 *chroot_filename = 0;
120 else if (
unformat (line_input,
"off"))
146 else if (
unformat (line_input,
"max %d", &max))
151 "can't change max value while pcap tx capture active...");
156 else if (
unformat (line_input,
"intfc %U",
161 else if (
unformat (line_input,
"intfc any"))
165 else if (
unformat (line_input,
"file %s", &filename))
170 "can't change file while pcap tx capture active...");
176 if (strstr ((
char *) filename,
"..")
177 || index ((
char *) filename,
'/'))
182 "Hint: Only filename, do not enter directory structure.");
188 chroot_filename =
format (0,
"/tmp/%s%c", filename, 0);
191 else if (
unformat (line_input,
"status"))
271 else if (chroot_filename)
333 .path =
"pcap tx trace",
335 "pcap tx trace [on|off] [max <nn>] [intfc <interface>|any] [file <name>] [status]",
345 struct rte_mempool *rmp;
353 unsigned count = rte_mempool_avail_count (rmp);
354 unsigned free_count = rte_mempool_in_use_count (rmp);
357 "name=\"%s\" available = %7d allocated = %7d total = %7d\n",
359 (
u32) (count + free_count));
380 .path =
"show dpdk buffer",
381 .short_help =
"show dpdk buffer",
391 static u32 *allocated_buffers;
398 if (
unformat (input,
"allocate %d", &n_alloc))
400 else if (
unformat (input,
"free %d", &n_free))
408 if (
vec_len (allocated_buffers) < n_free)
410 n_free,
vec_len (allocated_buffers));
412 first =
vec_len (allocated_buffers) - n_free;
414 _vec_len (allocated_buffers) =
first;
418 first =
vec_len (allocated_buffers);
420 vec_len (allocated_buffers) + n_alloc - 1);
424 _vec_len (allocated_buffers) = first + actual_alloc;
426 if (actual_alloc < n_alloc)
434 if (allocated_buffers &&
vec_len (allocated_buffers) == 0)
468 .path =
"test dpdk buffer",
469 .short_help =
"test dpdk buffer [allocate <nn>] [free <nn>]",
483 u32 hw_if_index = (
u32) ~ 0;
484 u32 nb_rx_desc = (
u32) ~ 0;
485 u32 nb_tx_desc = (
u32) ~ 0;
497 else if (
unformat (line_input,
"tx %d", &nb_tx_desc))
499 else if (
unformat (line_input,
"rx %d", &nb_rx_desc))
509 if (hw_if_index == (
u32) ~ 0)
522 "number of descriptors can be set only for " 527 if ((nb_rx_desc == (
u32) ~ 0 || nb_rx_desc == xd->
nb_rx_desc) &&
534 if (nb_rx_desc != (
u32) ~ 0)
537 if (nb_tx_desc != (
u32) ~ 0)
560 .path =
"set dpdk interface descriptors",
561 .short_help =
"set dpdk interface descriptors <interface> [rx <nn>] [tx <nn>]",
615 .path =
"show dpdk interface placement",
616 .short_help =
"show dpdk interface placement",
648 u32 hw_if_index = (
u32) ~ 0;
663 else if (
unformat (line_input,
"queue %d", &queue))
665 else if (
unformat (line_input,
"thread %d", &cpu))
675 if (hw_if_index == (
u32) ~ 0)
681 if (cpu < dm->input_cpu_first_index ||
717 VLIB_NODE_STATE_DISABLED);
721 VLIB_NODE_STATE_POLLING);
759 .path =
"set dpdk interface placement",
760 .short_help =
"set dpdk interface placement <interface> [queue <n>] thread <n>",
811 .path =
"show dpdk interface hqos placement",
812 .short_help =
"show dpdk interface hqos placement",
826 u32 hw_if_index = (
u32) ~ 0;
840 else if (
unformat (line_input,
"thread %d", &cpu))
850 if (hw_if_index == (
u32) ~ 0)
853 if (cpu < dm->hqos_cpu_first_index ||
916 .path =
"set dpdk interface hqos placement",
917 .short_help =
"set dpdk interface hqos placement <interface> thread <n>",
930 u32 hw_if_index = (
u32) ~ 0;
931 u32 subport_id = (
u32) ~ 0;
933 u32 profile_id = (
u32) ~ 0;
946 else if (
unformat (line_input,
"subport %d", &subport_id))
948 else if (
unformat (line_input,
"pipe %d", &pipe_id))
950 else if (
unformat (line_input,
"profile %d", &profile_id))
960 if (hw_if_index == (
u32) ~ 0)
970 rte_sched_pipe_config (xd->
hqos_ht->
hqos, subport_id, pipe_id,
1003 .path =
"set dpdk interface hqos pipe",
1004 .short_help =
"set dpdk interface hqos pipe <interface> subport <subport_id> pipe <pipe_id> " 1005 "profile <profile_id>",
1017 u32 hw_if_index = (
u32) ~ 0;
1018 u32 subport_id = (
u32) ~ 0;
1019 struct rte_sched_subport_params p;
1024 u32 tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE] =
1026 u32 tc_period = (
u32) ~ 0;
1038 else if (
unformat (line_input,
"subport %d", &subport_id))
1040 else if (
unformat (line_input,
"rate %d", &tb_rate))
1042 else if (
unformat (line_input,
"bktsize %d", &tb_size))
1044 else if (
unformat (line_input,
"tc0 %d", &tc_rate[0]))
1046 else if (
unformat (line_input,
"tc1 %d", &tc_rate[1]))
1048 else if (
unformat (line_input,
"tc2 %d", &tc_rate[2]))
1050 else if (
unformat (line_input,
"tc3 %d", &tc_rate[3]))
1052 else if (
unformat (line_input,
"period %d", &tc_period))
1062 error =
get_hqos (hw_if_index, subport_id, &xd, &devconf);
1067 memcpy (&p, &devconf->
hqos.
subport[subport_id], sizeof (p));
1070 if (tb_rate != (
u32) ~ 0)
1072 p.tb_rate = tb_rate;
1073 p.tc_rate[0] = tb_rate;
1074 p.tc_rate[1] = tb_rate;
1075 p.tc_rate[2] = tb_rate;
1076 p.tc_rate[3] = tb_rate;
1078 if (tb_size != (
u32) ~ 0)
1080 p.tb_size = tb_size;
1082 if (tc_rate[0] != (
u32) ~ 0)
1084 p.tc_rate[0] = tc_rate[0];
1086 if (tc_rate[1] != (
u32) ~ 0)
1088 p.tc_rate[1] = tc_rate[1];
1090 if (tc_rate[2] != (
u32) ~ 0)
1092 p.tc_rate[2] = tc_rate[2];
1094 if (tc_rate[3] != (
u32) ~ 0)
1096 p.tc_rate[3] = tc_rate[3];
1098 if (tc_period != (
u32) ~ 0)
1100 p.tc_period = tc_period;
1104 rv = rte_sched_subport_config (xd->
hqos_ht->
hqos, subport_id, &p);
1113 memcpy (&devconf->
hqos.
subport[subport_id], &p, sizeof (p));
1140 .path =
"set dpdk interface hqos subport",
1141 .short_help =
"set dpdk interface hqos subport <interface> subport <subport_id> " 1142 "[rate <n>] [bktsize <n>] [tc0 <n>] [tc1 <n>] [tc2 <n>] [tc3 <n>] " 1157 u32 hw_if_index = (
u32) ~ 0;
1173 else if (
unformat (line_input,
"entry %d", &entry))
1175 else if (
unformat (line_input,
"tc %d", &tc))
1177 else if (
unformat (line_input,
"queue %d", &queue))
1187 if (hw_if_index == (
u32) ~ 0)
1197 if (tc >= RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE)
1202 if (queue >= RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS)
1222 int worker_thread_count = tr->
count;
1224 val = tc * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1225 for (i = 0; i < worker_thread_count; i++)
1257 .path =
"set dpdk interface hqos tctbl",
1258 .short_help =
"set dpdk interface hqos tctbl <interface> entry <map_val> tc <tc_id> queue <queue_id>",
1273 struct rte_eth_dev_info dev_info;
1277 u32 hw_if_index = (
u32) ~ 0;
1287 int worker_thread_count = tr->
count;
1295 u32 n_subports_per_port, n_pipes_per_subport, tctbl_size;
1309 else if (
unformat (line_input,
"id subport"))
1311 else if (
unformat (line_input,
"id pipe"))
1313 else if (
unformat (line_input,
"id tc"))
1315 else if (
unformat (line_input,
"id %d", &
id))
1317 else if (
unformat (line_input,
"offset %d", &offset))
1319 else if (
unformat (line_input,
"mask %llx", &mask))
1330 if (hw_if_index == (
u32) ~ 0)
1340 if (dev_info.pci_dev)
1342 vlib_pci_addr_t pci_addr;
1344 pci_addr.domain = dev_info.pci_dev->addr.domain;
1345 pci_addr.bus = dev_info.pci_dev->addr.bus;
1346 pci_addr.slot = dev_info.pci_dev->addr.devid;
1347 pci_addr.function = dev_info.pci_dev->addr.function;
1358 if (devconf->hqos_enabled == 0)
1364 n_subports_per_port = devconf->hqos.port.n_subports_per_port;
1365 n_pipes_per_subport = devconf->hqos.port.n_pipes_per_subport;
1366 tctbl_size = RTE_DIM (devconf->hqos.tc_table);
1381 "(n_subports_per_port = %u)",
1382 n_subports_per_port);
1390 "(n_pipes_per_subport = %u)",
1391 n_pipes_per_subport);
1400 "(TC table size = %u)", tctbl_size);
1406 for (i = 0; i < worker_thread_count; i++)
1413 __builtin_ctzll (mask);
1419 __builtin_ctzll (mask);
1426 __builtin_ctzll (mask);
1476 .path =
"set dpdk interface hqos pktfield",
1477 .short_help =
"set dpdk interface hqos pktfield <interface> id subport|pipe|tc offset <n> " 1496 u32 hw_if_index = (
u32) ~ 0;
1497 u32 profile_id, subport_id,
i;
1498 struct rte_eth_dev_info dev_info;
1521 if (hw_if_index == (
u32) ~ 0)
1531 if (dev_info.pci_dev)
1533 vlib_pci_addr_t pci_addr;
1535 pci_addr.domain = dev_info.pci_dev->addr.domain;
1536 pci_addr.bus = dev_info.pci_dev->addr.bus;
1537 pci_addr.slot = dev_info.pci_dev->addr.devid;
1538 pci_addr.function = dev_info.pci_dev->addr.function;
1549 if (devconf->hqos_enabled == 0)
1567 cfg = &devconf->hqos;
1580 " Packet field 0: slab position = %4u, slab bitmask = 0x%016llx (subport)",
1583 " Packet field 1: slab position = %4u, slab bitmask = 0x%016llx (pipe)",
1586 " Packet field 2: slab position = %4u, slab bitmask = 0x%016llx (tc)",
1589 " Packet field 2 tc translation table: ([Mapped Value Range]: tc/queue tc/queue ...)");
1592 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1593 tctbl[0] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1594 tctbl[0] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1595 tctbl[1] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1596 tctbl[1] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1597 tctbl[2] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1598 tctbl[2] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1599 tctbl[3] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1600 tctbl[3] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1601 tctbl[4] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1602 tctbl[4] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1603 tctbl[5] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1604 tctbl[5] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1605 tctbl[6] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1606 tctbl[6] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1607 tctbl[7] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1608 tctbl[7] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1609 tctbl[8] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1610 tctbl[8] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1611 tctbl[9] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1612 tctbl[9] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1613 tctbl[10] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1614 tctbl[10] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1615 tctbl[11] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1616 tctbl[11] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1617 tctbl[12] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1618 tctbl[12] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1619 tctbl[13] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1620 tctbl[13] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1621 tctbl[14] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1622 tctbl[14] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1623 tctbl[15] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1624 tctbl[15] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1627 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1628 tctbl[16] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1629 tctbl[16] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1630 tctbl[17] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1631 tctbl[17] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1632 tctbl[18] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1633 tctbl[18] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1634 tctbl[19] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1635 tctbl[19] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1636 tctbl[20] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1637 tctbl[20] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1638 tctbl[21] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1639 tctbl[21] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1640 tctbl[22] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1641 tctbl[22] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1642 tctbl[23] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1643 tctbl[23] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1644 tctbl[24] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1645 tctbl[24] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1646 tctbl[25] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1647 tctbl[25] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1648 tctbl[26] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1649 tctbl[26] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1650 tctbl[27] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1651 tctbl[27] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1652 tctbl[28] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1653 tctbl[28] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1654 tctbl[29] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1655 tctbl[29] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1656 tctbl[30] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1657 tctbl[30] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1658 tctbl[31] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1659 tctbl[31] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1662 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1663 tctbl[32] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1664 tctbl[32] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1665 tctbl[33] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1666 tctbl[33] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1667 tctbl[34] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1668 tctbl[34] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1669 tctbl[35] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1670 tctbl[35] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1671 tctbl[36] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1672 tctbl[36] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1673 tctbl[37] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1674 tctbl[37] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1675 tctbl[38] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1676 tctbl[38] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1677 tctbl[39] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1678 tctbl[39] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1679 tctbl[40] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1680 tctbl[40] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1681 tctbl[41] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1682 tctbl[41] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1683 tctbl[42] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1684 tctbl[42] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1685 tctbl[43] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1686 tctbl[43] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1687 tctbl[44] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1688 tctbl[44] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1689 tctbl[45] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1690 tctbl[45] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1691 tctbl[46] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1692 tctbl[46] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1693 tctbl[47] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1694 tctbl[47] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1697 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1698 tctbl[48] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1699 tctbl[48] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1700 tctbl[49] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1701 tctbl[49] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1702 tctbl[50] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1703 tctbl[50] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1704 tctbl[51] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1705 tctbl[51] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1706 tctbl[52] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1707 tctbl[52] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1708 tctbl[53] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1709 tctbl[53] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1710 tctbl[54] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1711 tctbl[54] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1712 tctbl[55] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1713 tctbl[55] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1714 tctbl[56] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1715 tctbl[56] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1716 tctbl[57] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1717 tctbl[57] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1718 tctbl[58] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1719 tctbl[58] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1720 tctbl[59] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1721 tctbl[59] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1722 tctbl[60] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1723 tctbl[60] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1724 tctbl[61] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1725 tctbl[61] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1726 tctbl[62] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1727 tctbl[62] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1728 tctbl[63] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1729 tctbl[63] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1734 cfg->
port.frame_overhead);
1736 cfg->
port.n_subports_per_port);
1738 cfg->
port.n_pipes_per_subport);
1740 " Packet queue size: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u packets",
1741 cfg->
port.qsize[0], cfg->
port.qsize[1], cfg->
port.qsize[2],
1742 cfg->
port.qsize[3]);
1744 cfg->
port.n_pipe_profiles);
1746 for (subport_id = 0; subport_id <
vec_len (cfg->
subport); subport_id++)
1750 cfg->
subport[subport_id].tb_rate);
1752 cfg->
subport[subport_id].tb_size);
1754 " Traffic class rate: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u bytes/second",
1755 cfg->
subport[subport_id].tc_rate[0],
1756 cfg->
subport[subport_id].tc_rate[1],
1757 cfg->
subport[subport_id].tc_rate[2],
1758 cfg->
subport[subport_id].tc_rate[3]);
1760 cfg->
subport[subport_id].tc_period);
1763 for (profile_id = 0; profile_id <
vec_len (cfg->
pipe); profile_id++)
1767 cfg->
pipe[profile_id].tb_rate);
1769 cfg->
pipe[profile_id].tb_size);
1771 " Traffic class rate: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u bytes/second",
1772 cfg->
pipe[profile_id].tc_rate[0],
1773 cfg->
pipe[profile_id].tc_rate[1],
1774 cfg->
pipe[profile_id].tc_rate[2],
1775 cfg->
pipe[profile_id].tc_rate[3]);
1777 cfg->
pipe[profile_id].tc_period);
1778 #ifdef RTE_SCHED_SUBPORT_TC_OV 1780 cfg->
pipe[profile_id].tc_ov_weight);
1783 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
1786 " TC%u WRR weights: Q0 = %u, Q1 = %u, Q2 = %u, Q3 = %u",
1787 i, cfg->
pipe[profile_id].wrr_weights[i * 4],
1788 cfg->
pipe[profile_id].wrr_weights[i * 4 + 1],
1789 cfg->
pipe[profile_id].wrr_weights[i * 4 + 2],
1790 cfg->
pipe[profile_id].wrr_weights[i * 4 + 3]);
1794 #ifdef RTE_SCHED_RED 1796 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
1799 cfg->
port.red_params[i][e_RTE_METER_GREEN].min_th,
1800 cfg->
port.red_params[i][e_RTE_METER_YELLOW].min_th,
1801 cfg->
port.red_params[i][e_RTE_METER_RED].min_th);
1804 cfg->
port.red_params[i][e_RTE_METER_GREEN].max_th,
1805 cfg->
port.red_params[i][e_RTE_METER_YELLOW].max_th,
1806 cfg->
port.red_params[i][e_RTE_METER_RED].max_th);
1809 " TC%u inverted probability: G = %u, Y = %u, R = %u",
1810 i, cfg->
port.red_params[i][e_RTE_METER_GREEN].maxp_inv,
1811 cfg->
port.red_params[i][e_RTE_METER_YELLOW].maxp_inv,
1812 cfg->
port.red_params[i][e_RTE_METER_RED].maxp_inv);
1815 cfg->
port.red_params[i][e_RTE_METER_GREEN].wq_log2,
1816 cfg->
port.red_params[i][e_RTE_METER_YELLOW].wq_log2,
1817 cfg->
port.red_params[i][e_RTE_METER_RED].wq_log2);
1872 .path =
"show dpdk interface hqos",
1873 .short_help =
"show dpdk interface hqos <interface>",
1885 #ifdef RTE_SCHED_COLLECT_STATS 1887 u32 hw_if_index = (
u32) ~ 0;
1895 struct rte_eth_dev_info dev_info;
1898 struct rte_sched_queue_stats stats;
1911 else if (
unformat (line_input,
"subport %d", &subport))
1914 else if (
unformat (line_input,
"pipe %d", &pipe))
1917 else if (
unformat (line_input,
"tc %d", &tc))
1920 else if (
unformat (line_input,
"tc_q %d", &tc_q))
1931 if (hw_if_index == (
u32) ~ 0)
1941 if (dev_info.pci_dev)
1943 vlib_pci_addr_t pci_addr;
1945 pci_addr.domain = dev_info.pci_dev->addr.domain;
1946 pci_addr.bus = dev_info.pci_dev->addr.bus;
1947 pci_addr.slot = dev_info.pci_dev->addr.devid;
1948 pci_addr.function = dev_info.pci_dev->addr.function;
1959 if (devconf->hqos_enabled == 0)
1969 qindex = subport * devconf->hqos.port.n_pipes_per_subport + pipe;
1970 qindex = qindex * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + tc;
1971 qindex = qindex * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + tc_q;
1973 if (rte_sched_queue_read_stats (xd->
hqos_ht->
hqos, qindex, &stats, &qlen) !=
1982 vlib_cli_output (vm,
"%=24s%=16d",
"Packets dropped", stats.n_pkts_dropped);
1983 #ifdef RTE_SCHED_RED 1985 stats.n_pkts_red_dropped);
1988 vlib_cli_output (vm,
"%=24s%=16d",
"Bytes dropped", stats.n_bytes_dropped);
2028 .path =
"show dpdk hqos queue",
2029 .short_help =
"show dpdk hqos queue <interface> subport <subport_id> pipe <pipe_id> tc <tc_id> tc_q <queue_id>",
2039 #define _(a,b,c) vlib_cli_output (vm, "%-25s " b, a ":", c); 2040 _(
"DPDK Version",
"%s", rte_version ());
2059 .path =
"show dpdk version",
2060 .short_help =
"show dpdk version",
unformat_function_t unformat_vnet_hw_interface
#define vec_validate(V, I)
Make sure vector is long enough for given index (no header, unspecified alignment) ...
char * file_name
File name of pcap output.
sll srl srl sll sra u16x4 i
static clib_error_t * set_dpdk_if_hqos_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static void vlib_buffer_free(vlib_main_t *vm, u32 *buffers, u32 n_buffers)
Free buffers Frees the entire buffer chain for each buffer.
u32 n_packets_to_capture
Number of packets to capture.
static clib_error_t * set_dpdk_if_desc(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
int dpdk_hqos_validate_mask(u64 mask, u32 n)
static clib_error_t * show_dpdk_if_hqos(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static vnet_hw_interface_t * vnet_get_hw_interface(vnet_main_t *vnm, u32 hw_if_index)
static clib_error_t * get_hqos(u32 hw_if_index, u32 subport_id, dpdk_device_t **xd, dpdk_device_config_t **devconf)
#define vec_add1(V, E)
Add 1 element to end of vector (unspecified alignment).
dpdk_device_and_queue_t ** devices_by_hqos_cpu
static clib_error_t * set_dpdk_if_hqos_pipe(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_add2(V, P, N)
Add N elements to end of vector V, return pointer to new elements in P.
struct rte_sched_port_params port
static clib_error_t * show_dpdk_hqos_queue_stats(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
struct rte_sched_port * hqos
static clib_error_t * pcap_trace_command_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
unformat_function_t unformat_vnet_sw_interface
dpdk_device_config_hqos_t hqos
vlib_main_t ** vlib_mains
format_function_t format_vnet_sw_if_index_name
#define DPDK_DEVICE_FLAG_PMD
clib_error_t * dpdk_port_setup(dpdk_main_t *dm, dpdk_device_t *xd)
static clib_error_t * show_dpdk_buffer(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
struct rte_sched_pipe_params * pipe
#define VLIB_INIT_FUNCTION(x)
dpdk_config_main_t dpdk_config_main
vlib_node_registration_t dpdk_input_node
(constructor) VLIB_REGISTER_NODE (dpdk_input_node)
dpdk_device_config_t default_devconf
int input_cpu_first_index
#define vec_elt_at_index(v, i)
Get vector value at index i checking that i is in bounds.
#define clib_error_return(e, args...)
static clib_error_t * test_dpdk_buffer(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static clib_error_t * show_dpdk_if_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
dpdk_device_hqos_per_worker_thread_t * hqos_wt
static heap_elt_t * first(heap_header_t *h)
vlib_worker_thread_t * vlib_worker_threads
#define pool_elt_at_index(p, i)
Returns pointer to element at given index.
dpdk_device_and_queue_t ** devices_by_cpu
#define vec_del1(v, i)
Delete the element at index I.
static int dpdk_device_queue_sort(void *a1, void *a2)
static clib_error_t * set_dpdk_if_hqos_tctbl(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
u16 * cpu_socket_id_by_queue
#define vec_free(V)
Free vector's memory (no header).
dpdk_device_config_t * dev_confs
clib_error_t * pcap_write(pcap_main_t *pm)
Write PCAP file.
#define VLIB_CLI_COMMAND(x,...)
struct rte_mempool ** pktmbuf_pools
dpdk_device_hqos_per_hqos_thread_t * hqos_ht
#define clib_error_report(e)
static void vlib_node_set_state(vlib_main_t *vm, u32 node_index, vlib_node_state_t new_state)
Set node dispatch state.
uword * thread_registrations_by_name
clib_error_t * dpdk_cli_init(vlib_main_t *vm)
static clib_error_t * set_dpdk_if_hqos_subport(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define PCAP_DEF_PKT_TO_CAPTURE
template key/value backing page structure
pcap_packet_type_t packet_type
Packet type.
#define vec_len(v)
Number of elements in vector (rvalue-only, NULL tolerant)
static clib_error_t * set_dpdk_if_hqos_pktfield(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_sort_with_function(vec, f)
Sort a vector using the supplied element comparison function.
#define hash_get_mem(h, key)
struct clib_bihash_value offset
template key/value backing page structure
static vlib_thread_main_t * vlib_get_thread_main()
struct rte_sched_subport_params * subport
#define vec_foreach(var, vec)
Vector iterator.
static clib_error_t * set_dpdk_if_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static clib_error_t * show_dpdk_version_command_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static u32 vlib_buffer_alloc(vlib_main_t *vm, u32 *buffers, u32 n_buffers)
Allocate buffers into supplied array.
void vlib_cli_output(vlib_main_t *vm, char *fmt,...)
uword * device_config_index_by_pci_addr
u32 n_packets_captured
Number of packets currently captured.
static clib_error_t * show_dpdk_if_hqos_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
CLIB vectors are ubiquitous dynamically resized arrays with by user defined "headers".
dpdk_config_main_t * conf