FD.io VPP  v18.10-34-gcce845e
Vector Packet Processing
pp2.h
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1 /*
2  *------------------------------------------------------------------
3  * Copyright (c) 2018 Cisco and/or its affiliates.
4  * Licensed under the Apache License, Version 2.0 (the "License");
5  * you may not use this file except in compliance with the License.
6  * You may obtain a copy of the License at:
7  *
8  * http://www.apache.org/licenses/LICENSE-2.0
9  *
10  * Unless required by applicable law or agreed to in writing, software
11  * distributed under the License is distributed on an "AS IS" BASIS,
12  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
13  * See the License for the specific language governing permissions and
14  * limitations under the License.
15  *------------------------------------------------------------------
16  */
17 
18 #define MVCONF_DBG_LEVEL 0
19 #define MVCONF_PP2_BPOOL_COOKIE_SIZE 32
20 #define MVCONF_PP2_BPOOL_DMA_ADDR_SIZE 64
21 #define MVCONF_DMA_PHYS_ADDR_T_SIZE 64
22 #define MVCONF_SYS_DMA_UIO
23 #define MVCONF_TYPES_PUBLIC
24 #define MVCONF_DMA_PHYS_ADDR_T_PUBLIC
25 
26 #include <vlib/vlib.h>
27 
28 #include "mv_std.h"
29 #include "env/mv_sys_dma.h"
30 #include "drivers/mv_pp2.h"
31 #include <drivers/mv_pp2_bpool.h>
32 #include <drivers/mv_pp2_ppio.h>
33 
34 typedef struct
35 {
36  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
38  struct pp2_bpool *bpool;
40 
41 typedef struct
42 {
43  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
49 
50 typedef struct
51 {
52  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
54 #define MRVL_PP2_IF_F_ADMIN_UP (1 << 0)
55  struct pp2_ppio *ppio;
57 
60 
65 
66 #define MRVL_PP2_BUFF_BATCH_SZ VLIB_FRAME_SIZE
67 
68 typedef struct
69 {
70  CLIB_CACHE_LINE_ALIGN_MARK (cacheline0);
71  struct pp2_hif *hif;
72  struct pp2_ppio_desc *descs;
73  struct buff_release_entry bre[MRVL_PP2_BUFF_BATCH_SZ];
74  u32 buffers[VLIB_FRAME_SIZE];
76 
77 typedef struct
78 {
82 
85 
86 typedef struct
87 {
88  u8 *name;
91 
92  /* return */
93  int rv;
96 
98 void mrvl_pp2_delete_if (mrvl_pp2_if_t * dfif);
99 
100 /* output.c */
101 
102 #define foreach_mrvl_pp2_tx_func_error \
103  _(NO_FREE_SLOTS, "no free tx slots") \
104  _(PPIO_SEND, "pp2_ppio_send errors") \
105  _(PPIO_GET_NUM_OUTQ_DONE, "pp2_ppio_get_num_outq_done errors")
106 
107 typedef enum
108 {
109 #define _(f,s) MRVL_PP2_TX_ERROR_##f,
111 #undef _
114 
116  vlib_frame_t * frame);
117 
118 /* input.c */
119 
120 typedef struct
121 {
124  struct pp2_ppio_desc desc;
126 
128 
129 /* format.c */
133 
134 
135 /*
136  * fd.io coding-style-patch-verification: ON
137  *
138  * Local Variables:
139  * eval: (c-set-style "gnu")
140  * End:
141  */
struct pp2_ppio * ppio
Definition: pp2.h:55
mrvl_pp2_outq_t * outqs
Definition: pp2.h:59
#define CLIB_CACHE_LINE_ALIGN_MARK(mark)
Definition: cache.h:60
u32 dev_instance
Definition: pp2.h:61
u16 head
Definition: pp2.h:46
format_function_t format_mrvl_pp2_input_trace
Definition: pp2.h:130
struct pp2_ppio_desc * descs
Definition: pp2.h:72
u32 per_interface_next_index
Definition: pp2.h:56
vnet_device_class_t mrvl_pp2_device_class
void mrvl_pp2_delete_if(mrvl_pp2_if_t *dfif)
Definition: pp2.c:115
u8 *( format_function_t)(u8 *s, va_list *args)
Definition: format.h:48
struct _vnet_device_class vnet_device_class_t
unsigned char u8
Definition: types.h:56
u32 hw_if_index
Definition: pp2.h:63
void mrvl_pp2_create_if(mrvl_pp2_create_if_args_t *args)
Definition: pp2.c:177
struct pp2_bpool * bpool
Definition: pp2.h:38
#define foreach_mrvl_pp2_tx_func_error
Definition: pp2.h:102
format_function_t format_mrvl_pp2_interface
Definition: pp2.h:131
u32 sw_if_index
Definition: pp2.h:62
mrvl_pp2_tx_func_error_t
Definition: pp2.h:107
unsigned int u32
Definition: types.h:88
u16 size
Definition: pp2.h:44
#define VLIB_FRAME_SIZE
Definition: node.h:382
struct pp2_hif * hif
Definition: pp2.h:71
#define MRVL_PP2_BUFF_BATCH_SZ
Definition: pp2.h:66
unsigned short u16
Definition: types.h:57
u32 flags
Definition: pp2.h:53
mrvl_pp2_main_t mrvl_pp2_main
Definition: pp2.c:36
vlib_main_t * vm
Definition: buffer.c:294
u32 * buffers
Definition: pp2.h:45
vlib_node_registration_t mrvl_pp2_input_node
(constructor) VLIB_REGISTER_NODE (mrvl_pp2_input_node)
Definition: input.c:374
u16 tail
Definition: pp2.h:47
struct _vlib_node_registration vlib_node_registration_t
u64 uword
Definition: types.h:112
format_function_t format_mrvl_pp2_interface_name
Definition: pp2.h:132
clib_error_t * error
Definition: pp2.h:94
mrvl_pp2_if_t * interfaces
Definition: pp2.h:79
mrvl_pp2_per_thread_data_t * per_thread_data
Definition: pp2.h:80
uword mrvl_pp2_interface_tx(vlib_main_t *vm, vlib_node_runtime_t *node, vlib_frame_t *frame)
Definition: output.c:31
mrvl_pp2_inq_t * inqs
Definition: pp2.h:58
u16 size
Definition: pp2.h:37