FD.io VPP  v19.01.3-6-g70449b9b9
Vector Packet Processing
vector_altivec.h
Go to the documentation of this file.
1 /*
2  * Copyright (c) 2015 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 /*
16  Copyright (c) 2009 Eliot Dresselhaus
17 
18  Permission is hereby granted, free of charge, to any person obtaining
19  a copy of this software and associated documentation files (the
20  "Software"), to deal in the Software without restriction, including
21  without limitation the rights to use, copy, modify, merge, publish,
22  distribute, sublicense, and/or sell copies of the Software, and to
23  permit persons to whom the Software is furnished to do so, subject to
24  the following conditions:
25 
26  The above copyright notice and this permission notice shall be
27  included in all copies or substantial portions of the Software.
28 
29  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
31  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
32  NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
33  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
34  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
35  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
36 */
37 
38 #ifndef included_vector_altivec_h
39 #define included_vector_altivec_h
40 
41 /* 128 bit shifts. */
42 #define _(t,ti,lr,f) \
43  always_inline t t##_##lr (t x, t y) \
44  { return (t) __builtin_altivec_##f ((ti) x, (ti) y); } \
45  \
46  always_inline t t##_i##lr (t x, int i) \
47  { \
48  t j = {i,i,i,i}; \
49  return t##_##lr (x, j); \
50  }
51 
52 _(u16x8, i16x8, shift_left, vslh);
53 _(u32x4, i32x4, shift_left, vslw);
54 _(u16x8, i16x8, shift_right, vsrh);
55 _(u32x4, i32x4, shift_right, vsrw);
56 _(i16x8, i16x8, shift_right, vsrah);
57 _(i32x4, i32x4, shift_right, vsraw);
58 _(u16x8, i16x8, rotate_left, vrlh);
59 _(i16x8, i16x8, rotate_left, vrlh);
60 _(u32x4, i32x4, rotate_left, vrlw);
61 _(i32x4, i32x4, rotate_left, vrlw);
62 
63 #undef _
64 
65 #define _(t,it,lr,f) \
66  always_inline t t##_word_shift_##lr (t x, int n_words) \
67  { \
68  i32x4 n_bits = {0,0,0,n_words * BITS (it)}; \
69  return (t) __builtin_altivec_##f ((i32x4) x, n_bits); \
70  }
71 
72 _(u32x4, u32, left, vslo)
73 _(i32x4, i32, left, vslo)
74 _(u32x4, u32, right, vsro)
75 _(i32x4, i32, right, vsro)
76 _(u16x8, u16, left, vslo)
77 _(i16x8, i16, left, vslo)
78 _(u16x8, u16, right, vsro) _(i16x8, i16, right, vsro)
79 #undef _
81  u32
82  u32x4_get0 (u32x4 x)
83 {
84  u32x4_union_t y;
85  y.as_u32x4 = x;
86  return y.as_u32[3];
87 }
88 
89 /* Interleave. */
90 #define _(t,it,lh,f) \
91  always_inline t t##_interleave_##lh (t x, t y) \
92  { return (t) __builtin_altivec_##f ((it) x, (it) y); }
93 
94 _(u32x4, i32x4, lo, vmrglw)
95 _(i32x4, i32x4, lo, vmrglw)
96 _(u16x8, i16x8, lo, vmrglh)
97 _(i16x8, i16x8, lo, vmrglh)
98 _(u32x4, i32x4, hi, vmrghw)
99 _(i32x4, i32x4, hi, vmrghw)
100 _(u16x8, i16x8, hi, vmrghh) _(i16x8, i16x8, hi, vmrghh)
101 #undef _
102 /* Unaligned loads/stores. */
103 #ifndef __cplusplus
104 #define _(t) \
105  always_inline void t##_store_unaligned (t x, t * a) \
106  { clib_mem_unaligned (a, t) = x; } \
107  always_inline t t##_load_unaligned (t * a) \
108  { return clib_mem_unaligned (a, t); }
109  _(u8x16) _(u16x8) _(u32x4) _(u64x2) _(i8x16) _(i16x8) _(i32x4) _(i64x2)
110 #undef _
111 #endif
112 #define _signed_binop(n,m,f,g) \
113  /* Unsigned */ \
114  always_inline u##n##x##m \
115  u##n##x##m##_##f (u##n##x##m x, u##n##x##m y) \
116  { return (u##n##x##m) __builtin_altivec_##g ((i##n##x##m) x, (i##n##x##m) y); } \
117  \
118  /* Signed */ \
119  always_inline i##n##x##m \
120  i##n##x##m##_##f (i##n##x##m x, i##n##x##m y) \
121  { return (i##n##x##m) __builtin_altivec_##g ((i##n##x##m) x, (i##n##x##m) y); }
122 /* Compare operations. */
123  _signed_binop (16, 8, is_equal, vcmpequh)
124 _signed_binop (32, 4, is_equal, vcmpequw)
125 #undef _signed_binop
126  always_inline u16x8 u16x8_is_zero (u16x8 x)
127 {
128  u16x8 zero = { 0 };
129  return u16x8_is_equal (x, zero);
130 }
131 
132 always_inline u32
134 {
135  u32x4 cmp = u32x4_is_zero (x);
136  u32x4 tmp = { 0x000f, 0x00f0, 0x0f00, 0xf000, };
137  cmp &= tmp;
138  cmp |= u32x4_word_shift_right (cmp, 2);
139  cmp |= u32x4_word_shift_right (cmp, 1);
140  return u32x4_get0 (cmp);
141 }
142 
143 #endif /* included_vector_altivec_h */
144 
145 /*
146  * fd.io coding-style-patch-verification: ON
147  *
148  * Local Variables:
149  * eval: (c-set-style "gnu")
150  * End:
151  */
#define always_inline
Definition: clib.h:98
#define u32x4_word_shift_right(a, n)
Definition: vector_sse42.h:370
epu8_epi32 epu16_epi32 u64x2
Definition: vector_sse42.h:640
vslo vsro vslo static vsro u32 u32x4_get0(u32x4 x)
epu8_epi32 epu16_epi32 epu32_epi64 epi8_epi32 epi16_epi32 i64x2
Definition: vector_sse42.h:647
is_equal
static uword rotate_left(uword x, uword i)
Definition: bitops.h:142
static u32 u32x4_zero_byte_mask(u32x4 x)