FD.io VPP
v19.01.3-6-g70449b9b9
Vector Packet Processing
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Go to the source code of this file.
Data Structures | |
struct | ixge_dma_regs_t |
struct | ixge_rx_to_hw_descriptor_t |
struct | ixge_rx_from_hw_descriptor_t |
struct | ixge_tx_descriptor_t |
struct | ixge_tx_context_descriptor_t |
union | ixge_descriptor_t |
struct | ixge_regs_t |
union | ixge_flow_director_key_t |
struct | ixge_phy_t |
struct | ixge_dma_queue_t |
struct | ixge_device_t |
struct | ixge_main_t |
Enumerations | |
enum | ixge_counter_type_t { IXGE_N_COUNTER } |
enum | ixge_pci_device_id_t { foreach_ixge_pci_device_id } |
enum | ixge_rx_next_t { IXGE_RX_NEXT_IP4_INPUT, IXGE_RX_NEXT_IP6_INPUT, IXGE_RX_NEXT_ETHERNET_INPUT, IXGE_RX_NEXT_DROP, IXGE_RX_N_NEXT } |
Functions | |
static void | ixge_throttle_queue_interrupt (ixge_regs_t *r, u32 queue_interrupt_index, f64 inter_interrupt_interval_in_secs) |
void | ixge_set_next_node (ixge_rx_next_t, char *) |
Variables | |
ixge_main_t | ixge_main |
vnet_device_class_t | ixge_device_class |
#define foreach_ixge_pci_device_id |
#define IXGE_RX_DESCRIPTOR_STATUS0_L3_OFFSET | ( | s | ) | (((s) >> 21) & 0x3ff) |
#define IXGE_RX_DESCRIPTOR_STATUS0_LAYER2_ETHERNET_TYPE | ( | s | ) | ((s) & 7) |
#define IXGE_RX_DESCRIPTOR_STATUS2_ETHERNET_ERROR (1 << (20 + 9)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IP4_CHECKSUM_ERROR (1 << (20 + 11)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_DOUBLE_VLAN (1 << (0 + 9)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_END_OF_PACKET (1 << (0 + 1)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_IP4_CHECKSUMMED (1 << (0 + 6)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_OWNED_BY_SOFTWARE (1 << (0 + 0)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_TCP_CHECKSUMMED (1 << (0 + 5)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_IS_UDP_CHECKSUMMED (1 << (0 + 4)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_NOT_UNICAST (1 << (0 + 7)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_TCP_CHECKSUM_ERROR (1 << (20 + 10)) |
#define IXGE_RX_DESCRIPTOR_STATUS2_UDP_CHECKSUM_ERROR (1 << (0 + 10)) |
#define IXGE_TX_DESCRIPTOR_STATUS0_IS_ADVANCED (1 << (8 + 5)) |
#define IXGE_TX_DESCRIPTOR_STATUS0_IS_END_OF_PACKET (1 << IXGE_TX_DESCRIPTOR_STATUS0_LOG2_IS_END_OF_PACKET) |
#define IXGE_TX_DESCRIPTOR_STATUS0_LOG2_IS_END_OF_PACKET (8 + 0) |
#define IXGE_TX_DESCRIPTOR_STATUS0_LOG2_REPORT_STATUS (8 + 3) |
#define IXGE_TX_DESCRIPTOR_STATUS0_N_BYTES_THIS_BUFFER | ( | l | ) | ((l) << 0) |
#define IXGE_TX_DESCRIPTOR_STATUS0_REPORT_STATUS (1 << IXGE_TX_DESCRIPTOR_STATUS0_LOG2_REPORT_STATUS) |
#define IXGE_TX_DESCRIPTOR_STATUS1_INSERT_IP4_CHECKSUM (1 << (8 + 0)) |
#define IXGE_TX_DESCRIPTOR_STATUS1_INSERT_TCP_UDP_CHECKSUM (1 << (8 + 1)) |
#define IXGE_TX_DESCRIPTOR_STATUS1_IPSEC_OFFLOAD (1 << (8 + 2)) |
#define IXGE_TX_DESCRIPTOR_STATUS1_N_BYTES_IN_PACKET | ( | l | ) | ((l) << 14) |
enum ixge_counter_type_t |
enum ixge_pci_device_id_t |
enum ixge_rx_next_t |
void ixge_set_next_node | ( | ixge_rx_next_t | , |
char * | |||
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inlinestatic |
vnet_device_class_t ixge_device_class |
ixge_main_t ixge_main |