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Vector Packet Processing
vector_neon.h
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1 /*
2  * Copyright (c) 2015 Cisco and/or its affiliates.
3  * Licensed under the Apache License, Version 2.0 (the "License");
4  * you may not use this file except in compliance with the License.
5  * You may obtain a copy of the License at:
6  *
7  * http://www.apache.org/licenses/LICENSE-2.0
8  *
9  * Unless required by applicable law or agreed to in writing, software
10  * distributed under the License is distributed on an "AS IS" BASIS,
11  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12  * See the License for the specific language governing permissions and
13  * limitations under the License.
14  */
15 
16 #ifndef included_vector_neon_h
17 #define included_vector_neon_h
18 #include <arm_neon.h>
19 
20 /* Arithmetic */
21 #define u16x8_sub_saturate(a,b) vsubq_u16(a,b)
22 #define i16x8_sub_saturate(a,b) vsubq_s16(a,b)
23 /* Dummy. Aid making uniform macros */
24 #define vreinterpretq_u8_u8(a) a
25 /* Implement the missing intrinsics to make uniform macros */
26 #define vminvq_u64(x) \
27 ({ \
28  u64 x0 = vgetq_lane_u64(x, 0); \
29  u64 x1 = vgetq_lane_u64(x, 1); \
30  x0 < x1 ? x0 : x1; \
31 })
32 
33 /* Converts all ones/zeros compare mask to bitmap. */
36 {
37  uint8x16_t mask = { 0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80,
38  0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80
39  };
40  /* v --> [0xFF, 0x00, 0xFF, 0xFF, 0xFF, 0x00, 0xFF, 0x00, ... ] */
41  uint8x16_t x = vandq_u8 (v, mask);
42  /* after v & mask,
43  * x --> [0x01, 0x00, 0x04, 0x08, 0x10, 0x00, 0x40, 0x00, ... ] */
44  uint64x2_t x64 = vpaddlq_u32 (vpaddlq_u16 (vpaddlq_u8 (x)));
45  /* after merge, x64 --> [0x5D, 0x.. ] */
46  return (u32) (vgetq_lane_u64 (x64, 0) + (vgetq_lane_u64 (x64, 1) << 8));
47 }
48 
49 /* *INDENT-OFF* */
50 #define foreach_neon_vec128i \
51  _(i,8,16,s8) _(i,16,8,s16) _(i,32,4,s32) _(i,64,2,s64)
52 #define foreach_neon_vec128u \
53  _(u,8,16,u8) _(u,16,8,u16) _(u,32,4,u32) _(u,64,2,u64)
54 #define foreach_neon_vec128f \
55  _(f,32,4,f32) _(f,64,2,f64)
56 
57 #define _(t, s, c, i) \
58 static_always_inline t##s##x##c \
59 t##s##x##c##_splat (t##s x) \
60 { return (t##s##x##c) vdupq_n_##i (x); } \
61 \
62 static_always_inline t##s##x##c \
63 t##s##x##c##_load_unaligned (void *p) \
64 { return (t##s##x##c) vld1q_##i (p); } \
65 \
66 static_always_inline void \
67 t##s##x##c##_store_unaligned (t##s##x##c v, void *p) \
68 { vst1q_##i (p, v); } \
69 \
70 static_always_inline int \
71 t##s##x##c##_is_all_zero (t##s##x##c x) \
72 { return !!(vminvq_u##s (vceqq_##i (vdupq_n_##i(0), x))); } \
73 \
74 static_always_inline int \
75 t##s##x##c##_is_equal (t##s##x##c a, t##s##x##c b) \
76 { return !!(vminvq_u##s (vceqq_##i (a, b))); } \
77 \
78 static_always_inline int \
79 t##s##x##c##_is_all_equal (t##s##x##c v, t##s x) \
80 { return t##s##x##c##_is_equal (v, t##s##x##c##_splat (x)); }; \
81 \
82 static_always_inline u32 \
83 t##s##x##c##_zero_byte_mask (t##s##x##c x) \
84 { uint8x16_t v = vreinterpretq_u8_u##s (vceqq_##i (vdupq_n_##i(0), x)); \
85  return u8x16_compare_byte_mask (v); } \
86 
88 
89 #undef _
90 /* *INDENT-ON* */
91 
93 u16x8_byte_swap (u16x8 v)
94 {
95  return (u16x8) vrev16q_u8 ((u8x16) v);
96 }
97 
99 u8x16_shuffle (u8x16 v, u8x16 m)
100 {
101  return (u8x16) vqtbl1q_u8 (v, m);
102 }
103 
106 {
107  return (u32x4) vpaddq_u32 (v1, v2);
108 }
109 
112 {
113  return vmovl_u32 (vget_low_u32 (v));
114 }
115 
118 {
119  return vmovl_high_u32 (v);
120 }
121 
122 /* Creates a mask made up of the MSB of each byte of the source vector */
124 u8x16_msb_mask (u8x16 v)
125 {
126  int8x16_t shift =
127  { -7, -6, -5, -4, -3, -2, -1, 0, -7, -6, -5, -4, -3, -2, -1, 0 };
128  /* v --> [0x80, 0x7F, 0xF0, 0xAF, 0xF0, 0x00, 0xF2, 0x00, ... ] */
129  uint8x16_t x = vshlq_u8 (vandq_u8 (v, vdupq_n_u8 (0x80)), shift);
130  /* after (v & 0x80) >> shift,
131  * x --> [0x01, 0x00, 0x04, 0x08, 0x10, 0x00, 0x40, 0x00, ... ] */
132  uint64x2_t x64 = vpaddlq_u32 (vpaddlq_u16 (vpaddlq_u8 (x)));
133  /* after merge, x64 --> [0x5D, 0x.. ] */
134  return (u16) (vgetq_lane_u64 (x64, 0) + (vgetq_lane_u64 (x64, 1) << 8));
135 }
136 
137 #define CLIB_HAVE_VEC128_MSB_MASK
138 
139 #define CLIB_HAVE_VEC128_UNALIGNED_LOAD_STORE
140 #define CLIB_VEC128_SPLAT_DEFINED
141 #endif /* included_vector_neon_h */
142 
143 /*
144  * fd.io coding-style-patch-verification: ON
145  *
146  * Local Variables:
147  * eval: (c-set-style "gnu")
148  * End:
149  */
#define foreach_neon_vec128i
Definition: vector_neon.h:50
static_always_inline u64x2 u32x4_extend_to_u64x2_high(u32x4 v)
Definition: vector_neon.h:117
static_always_inline u32x4 u32x4_hadd(u32x4 v1, u32x4 v2)
Definition: vector_neon.h:105
#define static_always_inline
Definition: clib.h:99
#define always_inline
Definition: clib.h:98
unsigned int u32
Definition: types.h:88
epu8_epi32 epu16_epi32 u64x2
Definition: vector_sse42.h:665
unsigned short u16
Definition: types.h:57
static_always_inline u16 u8x16_msb_mask(u8x16 v)
Definition: vector_neon.h:124
static u32 u8x16_compare_byte_mask(u8x16 v)
Definition: vector_neon.h:35
static_always_inline u64x2 u32x4_extend_to_u64x2(u32x4 v)
Definition: vector_neon.h:111
#define foreach_neon_vec128u
Definition: vector_neon.h:52
static_always_inline u8x16 u8x16_shuffle(u8x16 v, u8x16 m)
Definition: vector_neon.h:99
unsigned long long u32x4
Definition: ixge.c:28
foreach_neon_vec128i foreach_neon_vec128u static_always_inline u16x8 u16x8_byte_swap(u16x8 v)
Definition: vector_neon.h:93