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Vector Packet Processing
cache.h
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/*
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* Copyright (c) 2015 Cisco and/or its affiliates.
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at:
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*
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Copyright (c) 2005 Eliot Dresselhaus
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Permission is hereby granted, free of charge, to any person obtaining
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a copy of this software and associated documentation files (the
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"Software"), to deal in the Software without restriction, including
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without limitation the rights to use, copy, modify, merge, publish,
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distribute, sublicense, and/or sell copies of the Software, and to
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permit persons to whom the Software is furnished to do so, subject to
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the following conditions:
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The above copyright notice and this permission notice shall be
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included in all copies or substantial portions of the Software.
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THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
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LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
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OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
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WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef included_clib_cache_h
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#define included_clib_cache_h
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#include <
vppinfra/error_bootstrap.h
>
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/*
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* Allow CFLAGS to override the configured / deduced cache line size
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*/
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#ifndef CLIB_LOG2_CACHE_LINE_BYTES
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/* Default cache line size of 64 bytes. */
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#ifndef CLIB_LOG2_CACHE_LINE_BYTES
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#define CLIB_LOG2_CACHE_LINE_BYTES 6
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#endif
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#endif
/* CLIB_LOG2_CACHE_LINE_BYTES defined */
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#if (CLIB_LOG2_CACHE_LINE_BYTES >= 9)
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#error Cache line size 512 bytes or greater
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#endif
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#define CLIB_CACHE_LINE_BYTES (1 << CLIB_LOG2_CACHE_LINE_BYTES)
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#define CLIB_CACHE_LINE_ALIGN_MARK(mark) u8 mark[0] __attribute__((aligned(CLIB_CACHE_LINE_BYTES)))
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#define CLIB_CACHE_LINE_ROUND(x) ((x + CLIB_CACHE_LINE_BYTES - 1) & ~(CLIB_CACHE_LINE_BYTES - 1))
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/* Default cache line fill buffers. */
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#ifndef CLIB_N_PREFETCHES
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#define CLIB_N_PREFETCHES 16
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#endif
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/* Read/write arguments to __builtin_prefetch. */
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#define CLIB_PREFETCH_READ 0
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#define CLIB_PREFETCH_LOAD 0
/* alias for read */
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#define CLIB_PREFETCH_WRITE 1
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#define CLIB_PREFETCH_STORE 1
/* alias for write */
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#define _CLIB_PREFETCH(n,size,type) \
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if ((size) > (n)*CLIB_CACHE_LINE_BYTES) \
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__builtin_prefetch (_addr + (n)*CLIB_CACHE_LINE_BYTES, \
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CLIB_PREFETCH_##type, \
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/* locality */
3);
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#define CLIB_PREFETCH(addr,size,type) \
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do { \
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void * _addr = (addr); \
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\
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ASSERT ((size) <= 4*CLIB_CACHE_LINE_BYTES); \
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_CLIB_PREFETCH (0, size, type); \
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_CLIB_PREFETCH (1, size, type); \
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_CLIB_PREFETCH (2, size, type); \
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_CLIB_PREFETCH (3, size, type); \
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} while (0)
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#undef _
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static_always_inline
void
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clib_prefetch_load
(
void
*p)
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{
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CLIB_PREFETCH
(p,
CLIB_CACHE_LINE_BYTES
, LOAD);
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}
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static_always_inline
void
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clib_prefetch_store
(
void
*p)
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{
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CLIB_PREFETCH
(p,
CLIB_CACHE_LINE_BYTES
, STORE);
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}
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#endif
/* included_clib_cache_h */
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/*
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* fd.io coding-style-patch-verification: ON
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*
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* Local Variables:
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* eval: (c-set-style "gnu")
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* End:
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*/
error_bootstrap.h
CLIB_PREFETCH
#define CLIB_PREFETCH(addr, size, type)
Definition:
cache.h:80
static_always_inline
#define static_always_inline
Definition:
clib.h:112
CLIB_CACHE_LINE_BYTES
#define CLIB_CACHE_LINE_BYTES
Definition:
cache.h:59
clib_prefetch_load
static_always_inline void clib_prefetch_load(void *p)
Definition:
cache.h:94
clib_prefetch_store
static_always_inline void clib_prefetch_store(void *p)
Definition:
cache.h:100
src
vppinfra
cache.h
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