FD.io VPP
v21.06-3-gbb25fbf28
Vector Packet Processing
perfmon_intel_wsm_ex.c
Go to the documentation of this file.
1
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#include <
perfmon/perfmon_intel.h
>
3
4
static
perfmon_intel_pmc_cpu_model_t
cpu_model_table
[] = {
5
{0x2F, 0x00, 0},
6
7
};
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static
perfmon_intel_pmc_event_t
event_table
[] = {
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{
11
.
event_code
= {0x14},
12
.umask = 0x1,
13
.event_name =
"arith.cycles_div_busy"
,
14
},
15
{
16
.event_code = {0x14},
17
.umask = 0x1,
18
.event_name =
"arith.div"
,
19
},
20
{
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.event_code = {0x14},
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.umask = 0x2,
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.event_name =
"arith.mul"
,
24
},
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{
26
.event_code = {0xE6},
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.umask = 0x2,
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.event_name =
"baclear.bad_target"
,
29
},
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{
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.event_code = {0xE6},
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.umask = 0x1,
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.event_name =
"baclear.clear"
,
34
},
35
{
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.event_code = {0xA7},
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.umask = 0x1,
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.event_name =
"baclear_force_iq"
,
39
},
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{
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.event_code = {0xE8},
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.umask = 0x1,
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.event_name =
"bpu_clears.early"
,
44
},
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{
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.event_code = {0xE8},
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.umask = 0x2,
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.event_name =
"bpu_clears.late"
,
49
},
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{
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.event_code = {0xE5},
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.umask = 0x1,
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.event_name =
"bpu_missed_call_ret"
,
54
},
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{
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.event_code = {0xE0},
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.umask = 0x1,
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.event_name =
"br_inst_decoded"
,
59
},
60
{
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.event_code = {0x88},
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.umask = 0x7F,
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.event_name =
"br_inst_exec.any"
,
64
},
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{
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.event_code = {0x88},
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.umask = 0x1,
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.event_name =
"br_inst_exec.cond"
,
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},
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{
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.event_code = {0x88},
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.umask = 0x2,
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.event_name =
"br_inst_exec.direct"
,
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},
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{
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.event_code = {0x88},
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.umask = 0x10,
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.event_name =
"br_inst_exec.direct_near_call"
,
79
},
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{
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.event_code = {0x88},
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.umask = 0x20,
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.event_name =
"br_inst_exec.indirect_near_call"
,
84
},
85
{
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.event_code = {0x88},
87
.umask = 0x4,
88
.event_name =
"br_inst_exec.indirect_non_call"
,
89
},
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{
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.event_code = {0x88},
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.umask = 0x30,
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.event_name =
"br_inst_exec.near_calls"
,
94
},
95
{
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.event_code = {0x88},
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.umask = 0x7,
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.event_name =
"br_inst_exec.non_calls"
,
99
},
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{
101
.event_code = {0x88},
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.umask = 0x8,
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.event_name =
"br_inst_exec.return_near"
,
104
},
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{
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.event_code = {0x88},
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.umask = 0x40,
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.event_name =
"br_inst_exec.taken"
,
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},
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{
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.event_code = {0xC4},
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.umask = 0x4,
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.event_name =
"br_inst_retired.all_branches"
,
114
},
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{
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.event_code = {0xC4},
117
.umask = 0x1,
118
.event_name =
"br_inst_retired.conditional"
,
119
},
120
{
121
.event_code = {0xC4},
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.umask = 0x2,
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.event_name =
"br_inst_retired.near_call"
,
124
},
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{
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.event_code = {0x89},
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.umask = 0x7F,
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.event_name =
"br_misp_exec.any"
,
129
},
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{
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.event_code = {0x89},
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.umask = 0x1,
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.event_name =
"br_misp_exec.cond"
,
134
},
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{
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.event_code = {0x89},
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.umask = 0x2,
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.event_name =
"br_misp_exec.direct"
,
139
},
140
{
141
.event_code = {0x89},
142
.umask = 0x10,
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.event_name =
"br_misp_exec.direct_near_call"
,
144
},
145
{
146
.event_code = {0x89},
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.umask = 0x20,
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.event_name =
"br_misp_exec.indirect_near_call"
,
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},
150
{
151
.event_code = {0x89},
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.umask = 0x4,
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.event_name =
"br_misp_exec.indirect_non_call"
,
154
},
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{
156
.event_code = {0x89},
157
.umask = 0x30,
158
.event_name =
"br_misp_exec.near_calls"
,
159
},
160
{
161
.event_code = {0x89},
162
.umask = 0x7,
163
.event_name =
"br_misp_exec.non_calls"
,
164
},
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{
166
.event_code = {0x89},
167
.umask = 0x8,
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.event_name =
"br_misp_exec.return_near"
,
169
},
170
{
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.event_code = {0x89},
172
.umask = 0x40,
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.event_name =
"br_misp_exec.taken"
,
174
},
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{
176
.event_code = {0xC5},
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.umask = 0x4,
178
.event_name =
"br_misp_retired.all_branches"
,
179
},
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{
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.event_code = {0xC5},
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.umask = 0x1,
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.event_name =
"br_misp_retired.conditional"
,
184
},
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{
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.event_code = {0xC5},
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.umask = 0x2,
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.event_name =
"br_misp_retired.near_call"
,
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},
190
{
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.event_code = {0x63},
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.umask = 0x2,
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.event_name =
"cache_lock_cycles.l1d"
,
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},
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{
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.event_code = {0x63},
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.umask = 0x1,
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.event_name =
"cache_lock_cycles.l1d_l2"
,
199
},
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{
201
.event_code = {0x0},
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.umask = 0x0,
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.event_name =
"cpu_clk_unhalted.ref"
,
204
},
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{
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.event_code = {0x3C},
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.umask = 0x1,
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.event_name =
"cpu_clk_unhalted.ref_p"
,
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},
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{
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.event_code = {0x0},
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.umask = 0x0,
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.event_name =
"cpu_clk_unhalted.thread"
,
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},
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{
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.event_code = {0x3C},
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.umask = 0x0,
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.event_name =
"cpu_clk_unhalted.thread_p"
,
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},
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{
221
.event_code = {0x3C},
222
.umask = 0x0,
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.event_name =
"cpu_clk_unhalted.total_cycles"
,
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},
225
{
226
.event_code = {0x8},
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.umask = 0x1,
228
.event_name =
"dtlb_load_misses.any"
,
229
},
230
{
231
.event_code = {0x8},
232
.umask = 0x80,
233
.event_name =
"dtlb_load_misses.large_walk_completed"
,
234
},
235
{
236
.event_code = {0x8},
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.umask = 0x20,
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.event_name =
"dtlb_load_misses.pde_miss"
,
239
},
240
{
241
.event_code = {0x8},
242
.umask = 0x10,
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.event_name =
"dtlb_load_misses.stlb_hit"
,
244
},
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{
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.event_code = {0x8},
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.umask = 0x2,
248
.event_name =
"dtlb_load_misses.walk_completed"
,
249
},
250
{
251
.event_code = {0x8},
252
.umask = 0x4,
253
.event_name =
"dtlb_load_misses.walk_cycles"
,
254
},
255
{
256
.event_code = {0x49},
257
.umask = 0x1,
258
.event_name =
"dtlb_misses.any"
,
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},
260
{
261
.event_code = {0x49},
262
.umask = 0x80,
263
.event_name =
"dtlb_misses.large_walk_completed"
,
264
},
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{
266
.event_code = {0x49},
267
.umask = 0x20,
268
.event_name =
"dtlb_misses.pde_miss"
,
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},
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{
271
.event_code = {0x49},
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.umask = 0x10,
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.event_name =
"dtlb_misses.stlb_hit"
,
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},
275
{
276
.event_code = {0x49},
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.umask = 0x2,
278
.event_name =
"dtlb_misses.walk_completed"
,
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},
280
{
281
.event_code = {0x49},
282
.umask = 0x4,
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.event_name =
"dtlb_misses.walk_cycles"
,
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},
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{
286
.event_code = {0x4F},
287
.umask = 0x10,
288
.event_name =
"ept.walk_cycles"
,
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},
290
{
291
.event_code = {0xD5},
292
.umask = 0x1,
293
.event_name =
"es_reg_renames"
,
294
},
295
{
296
.event_code = {0xF7},
297
.umask = 0x1,
298
.event_name =
"fp_assist.all"
,
299
},
300
{
301
.event_code = {0xF7},
302
.umask = 0x4,
303
.event_name =
"fp_assist.input"
,
304
},
305
{
306
.event_code = {0xF7},
307
.umask = 0x2,
308
.event_name =
"fp_assist.output"
,
309
},
310
{
311
.event_code = {0x10},
312
.umask = 0x2,
313
.event_name =
"fp_comp_ops_exe.mmx"
,
314
},
315
{
316
.event_code = {0x10},
317
.umask = 0x80,
318
.event_name =
"fp_comp_ops_exe.sse_double_precision"
,
319
},
320
{
321
.event_code = {0x10},
322
.umask = 0x4,
323
.event_name =
"fp_comp_ops_exe.sse_fp"
,
324
},
325
{
326
.event_code = {0x10},
327
.umask = 0x10,
328
.event_name =
"fp_comp_ops_exe.sse_fp_packed"
,
329
},
330
{
331
.event_code = {0x10},
332
.umask = 0x20,
333
.event_name =
"fp_comp_ops_exe.sse_fp_scalar"
,
334
},
335
{
336
.event_code = {0x10},
337
.umask = 0x40,
338
.event_name =
"fp_comp_ops_exe.sse_single_precision"
,
339
},
340
{
341
.event_code = {0x10},
342
.umask = 0x8,
343
.event_name =
"fp_comp_ops_exe.sse2_integer"
,
344
},
345
{
346
.event_code = {0x10},
347
.umask = 0x1,
348
.event_name =
"fp_comp_ops_exe.x87"
,
349
},
350
{
351
.event_code = {0xCC},
352
.umask = 0x3,
353
.event_name =
"fp_mmx_trans.any"
,
354
},
355
{
356
.event_code = {0xCC},
357
.umask = 0x1,
358
.event_name =
"fp_mmx_trans.to_fp"
,
359
},
360
{
361
.event_code = {0xCC},
362
.umask = 0x2,
363
.event_name =
"fp_mmx_trans.to_mmx"
,
364
},
365
{
366
.event_code = {0x87},
367
.umask = 0xF,
368
.event_name =
"ild_stall.any"
,
369
},
370
{
371
.event_code = {0x87},
372
.umask = 0x4,
373
.event_name =
"ild_stall.iq_full"
,
374
},
375
{
376
.event_code = {0x87},
377
.umask = 0x1,
378
.event_name =
"ild_stall.lcp"
,
379
},
380
{
381
.event_code = {0x87},
382
.umask = 0x2,
383
.event_name =
"ild_stall.mru"
,
384
},
385
{
386
.event_code = {0x87},
387
.umask = 0x8,
388
.event_name =
"ild_stall.regen"
,
389
},
390
{
391
.event_code = {0x18},
392
.umask = 0x1,
393
.event_name =
"inst_decoded.dec0"
,
394
},
395
{
396
.event_code = {0x1E},
397
.umask = 0x1,
398
.event_name =
"inst_queue_write_cycles"
,
399
},
400
{
401
.event_code = {0x17},
402
.umask = 0x1,
403
.event_name =
"inst_queue_writes"
,
404
},
405
{
406
.event_code = {0x0},
407
.umask = 0x0,
408
.event_name =
"inst_retired.any"
,
409
},
410
{
411
.event_code = {0xC0},
412
.umask = 0x1,
413
.event_name =
"inst_retired.any_p"
,
414
},
415
{
416
.event_code = {0xC0},
417
.umask = 0x4,
418
.event_name =
"inst_retired.mmx"
,
419
},
420
{
421
.event_code = {0xC0},
422
.umask = 0x1,
423
.event_name =
"inst_retired.total_cycles"
,
424
},
425
{
426
.event_code = {0xC0},
427
.umask = 0x2,
428
.event_name =
"inst_retired.x87"
,
429
},
430
{
431
.event_code = {0x6C},
432
.umask = 0x1,
433
.event_name =
"io_transactions"
,
434
},
435
{
436
.event_code = {0xAE},
437
.umask = 0x1,
438
.event_name =
"itlb_flush"
,
439
},
440
{
441
.event_code = {0xC8},
442
.umask = 0x20,
443
.event_name =
"itlb_miss_retired"
,
444
},
445
{
446
.event_code = {0x85},
447
.umask = 0x1,
448
.event_name =
"itlb_misses.any"
,
449
},
450
{
451
.event_code = {0x85},
452
.umask = 0x80,
453
.event_name =
"itlb_misses.large_walk_completed"
,
454
},
455
{
456
.event_code = {0x85},
457
.umask = 0x2,
458
.event_name =
"itlb_misses.walk_completed"
,
459
},
460
{
461
.event_code = {0x85},
462
.umask = 0x4,
463
.event_name =
"itlb_misses.walk_cycles"
,
464
},
465
{
466
.event_code = {0x51},
467
.umask = 0x4,
468
.event_name =
"l1d.m_evict"
,
469
},
470
{
471
.event_code = {0x51},
472
.umask = 0x2,
473
.event_name =
"l1d.m_repl"
,
474
},
475
{
476
.event_code = {0x51},
477
.umask = 0x8,
478
.event_name =
"l1d.m_snoop_evict"
,
479
},
480
{
481
.event_code = {0x51},
482
.umask = 0x1,
483
.event_name =
"l1d.repl"
,
484
},
485
{
486
.event_code = {0x52},
487
.umask = 0x1,
488
.event_name =
"l1d_cache_prefetch_lock_fb_hit"
,
489
},
490
{
491
.event_code = {0x4E},
492
.umask = 0x2,
493
.event_name =
"l1d_prefetch.miss"
,
494
},
495
{
496
.event_code = {0x4E},
497
.umask = 0x1,
498
.event_name =
"l1d_prefetch.requests"
,
499
},
500
{
501
.event_code = {0x4E},
502
.umask = 0x4,
503
.event_name =
"l1d_prefetch.triggers"
,
504
},
505
{
506
.event_code = {0x28},
507
.umask = 0x4,
508
.event_name =
"l1d_wb_l2.e_state"
,
509
},
510
{
511
.event_code = {0x28},
512
.umask = 0x1,
513
.event_name =
"l1d_wb_l2.i_state"
,
514
},
515
{
516
.event_code = {0x28},
517
.umask = 0x8,
518
.event_name =
"l1d_wb_l2.m_state"
,
519
},
520
{
521
.event_code = {0x28},
522
.umask = 0xF,
523
.event_name =
"l1d_wb_l2.mesi"
,
524
},
525
{
526
.event_code = {0x28},
527
.umask = 0x2,
528
.event_name =
"l1d_wb_l2.s_state"
,
529
},
530
{
531
.event_code = {0x80},
532
.umask = 0x4,
533
.event_name =
"l1i.cycles_stalled"
,
534
},
535
{
536
.event_code = {0x80},
537
.umask = 0x1,
538
.event_name =
"l1i.hits"
,
539
},
540
{
541
.event_code = {0x80},
542
.umask = 0x2,
543
.event_name =
"l1i.misses"
,
544
},
545
{
546
.event_code = {0x80},
547
.umask = 0x3,
548
.event_name =
"l1i.reads"
,
549
},
550
{
551
.event_code = {0x26},
552
.umask = 0xFF,
553
.event_name =
"l2_data_rqsts.any"
,
554
},
555
{
556
.event_code = {0x26},
557
.umask = 0x4,
558
.event_name =
"l2_data_rqsts.demand.e_state"
,
559
},
560
{
561
.event_code = {0x26},
562
.umask = 0x1,
563
.event_name =
"l2_data_rqsts.demand.i_state"
,
564
},
565
{
566
.event_code = {0x26},
567
.umask = 0x8,
568
.event_name =
"l2_data_rqsts.demand.m_state"
,
569
},
570
{
571
.event_code = {0x26},
572
.umask = 0xF,
573
.event_name =
"l2_data_rqsts.demand.mesi"
,
574
},
575
{
576
.event_code = {0x26},
577
.umask = 0x2,
578
.event_name =
"l2_data_rqsts.demand.s_state"
,
579
},
580
{
581
.event_code = {0x26},
582
.umask = 0x40,
583
.event_name =
"l2_data_rqsts.prefetch.e_state"
,
584
},
585
{
586
.event_code = {0x26},
587
.umask = 0x10,
588
.event_name =
"l2_data_rqsts.prefetch.i_state"
,
589
},
590
{
591
.event_code = {0x26},
592
.umask = 0x80,
593
.event_name =
"l2_data_rqsts.prefetch.m_state"
,
594
},
595
{
596
.event_code = {0x26},
597
.umask = 0xF0,
598
.event_name =
"l2_data_rqsts.prefetch.mesi"
,
599
},
600
{
601
.event_code = {0x26},
602
.umask = 0x20,
603
.event_name =
"l2_data_rqsts.prefetch.s_state"
,
604
},
605
{
606
.event_code = {0xF1},
607
.umask = 0x7,
608
.event_name =
"l2_lines_in.any"
,
609
},
610
{
611
.event_code = {0xF1},
612
.umask = 0x4,
613
.event_name =
"l2_lines_in.e_state"
,
614
},
615
{
616
.event_code = {0xF1},
617
.umask = 0x2,
618
.event_name =
"l2_lines_in.s_state"
,
619
},
620
{
621
.event_code = {0xF2},
622
.umask = 0xF,
623
.event_name =
"l2_lines_out.any"
,
624
},
625
{
626
.event_code = {0xF2},
627
.umask = 0x1,
628
.event_name =
"l2_lines_out.demand_clean"
,
629
},
630
{
631
.event_code = {0xF2},
632
.umask = 0x2,
633
.event_name =
"l2_lines_out.demand_dirty"
,
634
},
635
{
636
.event_code = {0xF2},
637
.umask = 0x4,
638
.event_name =
"l2_lines_out.prefetch_clean"
,
639
},
640
{
641
.event_code = {0xF2},
642
.umask = 0x8,
643
.event_name =
"l2_lines_out.prefetch_dirty"
,
644
},
645
{
646
.event_code = {0x24},
647
.umask = 0x10,
648
.event_name =
"l2_rqsts.ifetch_hit"
,
649
},
650
{
651
.event_code = {0x24},
652
.umask = 0x20,
653
.event_name =
"l2_rqsts.ifetch_miss"
,
654
},
655
{
656
.event_code = {0x24},
657
.umask = 0x30,
658
.event_name =
"l2_rqsts.ifetches"
,
659
},
660
{
661
.event_code = {0x24},
662
.umask = 0x1,
663
.event_name =
"l2_rqsts.ld_hit"
,
664
},
665
{
666
.event_code = {0x24},
667
.umask = 0x2,
668
.event_name =
"l2_rqsts.ld_miss"
,
669
},
670
{
671
.event_code = {0x24},
672
.umask = 0x3,
673
.event_name =
"l2_rqsts.loads"
,
674
},
675
{
676
.event_code = {0x24},
677
.umask = 0xAA,
678
.event_name =
"l2_rqsts.miss"
,
679
},
680
{
681
.event_code = {0x24},
682
.umask = 0x40,
683
.event_name =
"l2_rqsts.prefetch_hit"
,
684
},
685
{
686
.event_code = {0x24},
687
.umask = 0x80,
688
.event_name =
"l2_rqsts.prefetch_miss"
,
689
},
690
{
691
.event_code = {0x24},
692
.umask = 0xC0,
693
.event_name =
"l2_rqsts.prefetches"
,
694
},
695
{
696
.event_code = {0x24},
697
.umask = 0xFF,
698
.event_name =
"l2_rqsts.references"
,
699
},
700
{
701
.event_code = {0x24},
702
.umask = 0x4,
703
.event_name =
"l2_rqsts.rfo_hit"
,
704
},
705
{
706
.event_code = {0x24},
707
.umask = 0x8,
708
.event_name =
"l2_rqsts.rfo_miss"
,
709
},
710
{
711
.event_code = {0x24},
712
.umask = 0xC,
713
.event_name =
"l2_rqsts.rfos"
,
714
},
715
{
716
.event_code = {0xF0},
717
.umask = 0x80,
718
.event_name =
"l2_transactions.any"
,
719
},
720
{
721
.event_code = {0xF0},
722
.umask = 0x20,
723
.event_name =
"l2_transactions.fill"
,
724
},
725
{
726
.event_code = {0xF0},
727
.umask = 0x4,
728
.event_name =
"l2_transactions.ifetch"
,
729
},
730
{
731
.event_code = {0xF0},
732
.umask = 0x10,
733
.event_name =
"l2_transactions.l1d_wb"
,
734
},
735
{
736
.event_code = {0xF0},
737
.umask = 0x1,
738
.event_name =
"l2_transactions.load"
,
739
},
740
{
741
.event_code = {0xF0},
742
.umask = 0x8,
743
.event_name =
"l2_transactions.prefetch"
,
744
},
745
{
746
.event_code = {0xF0},
747
.umask = 0x2,
748
.event_name =
"l2_transactions.rfo"
,
749
},
750
{
751
.event_code = {0xF0},
752
.umask = 0x40,
753
.event_name =
"l2_transactions.wb"
,
754
},
755
{
756
.event_code = {0x27},
757
.umask = 0x40,
758
.event_name =
"l2_write.lock.e_state"
,
759
},
760
{
761
.event_code = {0x27},
762
.umask = 0xE0,
763
.event_name =
"l2_write.lock.hit"
,
764
},
765
{
766
.event_code = {0x27},
767
.umask = 0x10,
768
.event_name =
"l2_write.lock.i_state"
,
769
},
770
{
771
.event_code = {0x27},
772
.umask = 0x80,
773
.event_name =
"l2_write.lock.m_state"
,
774
},
775
{
776
.event_code = {0x27},
777
.umask = 0xF0,
778
.event_name =
"l2_write.lock.mesi"
,
779
},
780
{
781
.event_code = {0x27},
782
.umask = 0x20,
783
.event_name =
"l2_write.lock.s_state"
,
784
},
785
{
786
.event_code = {0x27},
787
.umask = 0xE,
788
.event_name =
"l2_write.rfo.hit"
,
789
},
790
{
791
.event_code = {0x27},
792
.umask = 0x1,
793
.event_name =
"l2_write.rfo.i_state"
,
794
},
795
{
796
.event_code = {0x27},
797
.umask = 0x8,
798
.event_name =
"l2_write.rfo.m_state"
,
799
},
800
{
801
.event_code = {0x27},
802
.umask = 0xF,
803
.event_name =
"l2_write.rfo.mesi"
,
804
},
805
{
806
.event_code = {0x27},
807
.umask = 0x2,
808
.event_name =
"l2_write.rfo.s_state"
,
809
},
810
{
811
.event_code = {0x82},
812
.umask = 0x1,
813
.event_name =
"large_itlb.hit"
,
814
},
815
{
816
.event_code = {0x3},
817
.umask = 0x2,
818
.event_name =
"load_block.overlap_store"
,
819
},
820
{
821
.event_code = {0x13},
822
.umask = 0x7,
823
.event_name =
"load_dispatch.any"
,
824
},
825
{
826
.event_code = {0x13},
827
.umask = 0x4,
828
.event_name =
"load_dispatch.mob"
,
829
},
830
{
831
.event_code = {0x13},
832
.umask = 0x1,
833
.event_name =
"load_dispatch.rs"
,
834
},
835
{
836
.event_code = {0x13},
837
.umask = 0x2,
838
.event_name =
"load_dispatch.rs_delayed"
,
839
},
840
{
841
.event_code = {0x4C},
842
.umask = 0x1,
843
.event_name =
"load_hit_pre"
,
844
},
845
{
846
.event_code = {0x2E},
847
.umask = 0x41,
848
.event_name =
"longest_lat_cache.miss"
,
849
},
850
{
851
.event_code = {0x2E},
852
.umask = 0x4F,
853
.event_name =
"longest_lat_cache.reference"
,
854
},
855
{
856
.event_code = {0xA8},
857
.umask = 0x1,
858
.event_name =
"lsd.active"
,
859
},
860
{
861
.event_code = {0xA8},
862
.umask = 0x1,
863
.event_name =
"lsd.inactive"
,
864
},
865
{
866
.event_code = {0x20},
867
.umask = 0x1,
868
.event_name =
"lsd_overflow"
,
869
},
870
{
871
.event_code = {0xC3},
872
.umask = 0x1,
873
.event_name =
"machine_clears.cycles"
,
874
},
875
{
876
.event_code = {0xC3},
877
.umask = 0x2,
878
.event_name =
"machine_clears.mem_order"
,
879
},
880
{
881
.event_code = {0xC3},
882
.umask = 0x4,
883
.event_name =
"machine_clears.smc"
,
884
},
885
{
886
.event_code = {0xD0},
887
.umask = 0x1,
888
.event_name =
"macro_insts.decoded"
,
889
},
890
{
891
.event_code = {0xA6},
892
.umask = 0x1,
893
.event_name =
"macro_insts.fusions_decoded"
,
894
},
895
{
896
.event_code = {0xB},
897
.umask = 0x1,
898
.event_name =
"mem_inst_retired.loads"
,
899
},
900
{
901
.event_code = {0xB},
902
.umask = 0x2,
903
.event_name =
"mem_inst_retired.stores"
,
904
},
905
{
906
.event_code = {0xCB},
907
.umask = 0x80,
908
.event_name =
"mem_load_retired.dtlb_miss"
,
909
},
910
{
911
.event_code = {0xCB},
912
.umask = 0x40,
913
.event_name =
"mem_load_retired.hit_lfb"
,
914
},
915
{
916
.event_code = {0xCB},
917
.umask = 0x1,
918
.event_name =
"mem_load_retired.l1d_hit"
,
919
},
920
{
921
.event_code = {0xCB},
922
.umask = 0x2,
923
.event_name =
"mem_load_retired.l2_hit"
,
924
},
925
{
926
.event_code = {0xCB},
927
.umask = 0x10,
928
.event_name =
"mem_load_retired.llc_miss"
,
929
},
930
{
931
.event_code = {0xCB},
932
.umask = 0x4,
933
.event_name =
"mem_load_retired.llc_unshared_hit"
,
934
},
935
{
936
.event_code = {0xCB},
937
.umask = 0x8,
938
.event_name =
"mem_load_retired.other_core_l2_hit_hitm"
,
939
},
940
{
941
.event_code = {0xC},
942
.umask = 0x1,
943
.event_name =
"mem_store_retired.dtlb_miss"
,
944
},
945
{
946
.event_code = {0xF},
947
.umask = 0x2,
948
.event_name =
"mem_uncore_retired.local_hitm"
,
949
},
950
{
951
.event_code = {0xF},
952
.umask = 0x8,
953
.event_name =
"mem_uncore_retired.local_dram_and_remote_cache_hit"
,
954
},
955
{
956
.event_code = {0xF},
957
.umask = 0x20,
958
.event_name =
"mem_uncore_retired.remote_dram"
,
959
},
960
{
961
.event_code = {0xF},
962
.umask = 0x80,
963
.event_name =
"mem_uncore_retired.uncacheable"
,
964
},
965
{
966
.event_code = {0xF},
967
.umask = 0x4,
968
.event_name =
"mem_uncore_retired.remote_hitm"
,
969
},
970
{
971
.event_code = {0x5},
972
.umask = 0x2,
973
.event_name =
"misalign_mem_ref.store"
,
974
},
975
{
976
.event_code = {0xB0},
977
.umask = 0x80,
978
.event_name =
"offcore_requests.any"
,
979
},
980
{
981
.event_code = {0xB0},
982
.umask = 0x8,
983
.event_name =
"offcore_requests.any.read"
,
984
},
985
{
986
.event_code = {0xB0},
987
.umask = 0x10,
988
.event_name =
"offcore_requests.any.rfo"
,
989
},
990
{
991
.event_code = {0xB0},
992
.umask = 0x2,
993
.event_name =
"offcore_requests.demand.read_code"
,
994
},
995
{
996
.event_code = {0xB0},
997
.umask = 0x1,
998
.event_name =
"offcore_requests.demand.read_data"
,
999
},
1000
{
1001
.event_code = {0xB0},
1002
.umask = 0x4,
1003
.event_name =
"offcore_requests.demand.rfo"
,
1004
},
1005
{
1006
.event_code = {0xB0},
1007
.umask = 0x40,
1008
.event_name =
"offcore_requests.l1d_writeback"
,
1009
},
1010
{
1011
.event_code = {0x60},
1012
.umask = 0x8,
1013
.event_name =
"offcore_requests_outstanding.any.read"
,
1014
},
1015
{
1016
.event_code = {0x60},
1017
.umask = 0x8,
1018
.event_name =
"offcore_requests_outstanding.any.read_not_empty"
,
1019
},
1020
{
1021
.event_code = {0x60},
1022
.umask = 0x2,
1023
.event_name =
"offcore_requests_outstanding.demand.read_code"
,
1024
},
1025
{
1026
.event_code = {0x60},
1027
.umask = 0x2,
1028
.event_name =
"offcore_requests_outstanding.demand.read_code_not_empty"
,
1029
},
1030
{
1031
.event_code = {0x60},
1032
.umask = 0x1,
1033
.event_name =
"offcore_requests_outstanding.demand.read_data"
,
1034
},
1035
{
1036
.event_code = {0x60},
1037
.umask = 0x1,
1038
.event_name =
"offcore_requests_outstanding.demand.read_data_not_empty"
,
1039
},
1040
{
1041
.event_code = {0x60},
1042
.umask = 0x4,
1043
.event_name =
"offcore_requests_outstanding.demand.rfo"
,
1044
},
1045
{
1046
.event_code = {0x60},
1047
.umask = 0x4,
1048
.event_name =
"offcore_requests_outstanding.demand.rfo_not_empty"
,
1049
},
1050
{
1051
.event_code = {0xB2},
1052
.umask = 0x1,
1053
.event_name =
"offcore_requests_sq_full"
,
1054
},
1055
{
1056
.event_code = {0x7},
1057
.umask = 0x1,
1058
.event_name =
"partial_address_alias"
,
1059
},
1060
{
1061
.event_code = {0xD2},
1062
.umask = 0xF,
1063
.event_name =
"rat_stalls.any"
,
1064
},
1065
{
1066
.event_code = {0xD2},
1067
.umask = 0x1,
1068
.event_name =
"rat_stalls.flags"
,
1069
},
1070
{
1071
.event_code = {0xD2},
1072
.umask = 0x2,
1073
.event_name =
"rat_stalls.registers"
,
1074
},
1075
{
1076
.event_code = {0xD2},
1077
.umask = 0x4,
1078
.event_name =
"rat_stalls.rob_read_port"
,
1079
},
1080
{
1081
.event_code = {0xD2},
1082
.umask = 0x8,
1083
.event_name =
"rat_stalls.scoreboard"
,
1084
},
1085
{
1086
.event_code = {0xA2},
1087
.umask = 0x1,
1088
.event_name =
"resource_stalls.any"
,
1089
},
1090
{
1091
.event_code = {0xA2},
1092
.umask = 0x20,
1093
.event_name =
"resource_stalls.fpcw"
,
1094
},
1095
{
1096
.event_code = {0xA2},
1097
.umask = 0x2,
1098
.event_name =
"resource_stalls.load"
,
1099
},
1100
{
1101
.event_code = {0xA2},
1102
.umask = 0x40,
1103
.event_name =
"resource_stalls.mxcsr"
,
1104
},
1105
{
1106
.event_code = {0xA2},
1107
.umask = 0x80,
1108
.event_name =
"resource_stalls.other"
,
1109
},
1110
{
1111
.event_code = {0xA2},
1112
.umask = 0x10,
1113
.event_name =
"resource_stalls.rob_full"
,
1114
},
1115
{
1116
.event_code = {0xA2},
1117
.umask = 0x4,
1118
.event_name =
"resource_stalls.rs_full"
,
1119
},
1120
{
1121
.event_code = {0xA2},
1122
.umask = 0x8,
1123
.event_name =
"resource_stalls.store"
,
1124
},
1125
{
1126
.event_code = {0x4},
1127
.umask = 0x7,
1128
.event_name =
"sb_drain.any"
,
1129
},
1130
{
1131
.event_code = {0xD4},
1132
.umask = 0x1,
1133
.event_name =
"seg_rename_stalls"
,
1134
},
1135
{
1136
.event_code = {0x12},
1137
.umask = 0x4,
1138
.event_name =
"simd_int_128.pack"
,
1139
},
1140
{
1141
.event_code = {0x12},
1142
.umask = 0x20,
1143
.event_name =
"simd_int_128.packed_arith"
,
1144
},
1145
{
1146
.event_code = {0x12},
1147
.umask = 0x10,
1148
.event_name =
"simd_int_128.packed_logical"
,
1149
},
1150
{
1151
.event_code = {0x12},
1152
.umask = 0x1,
1153
.event_name =
"simd_int_128.packed_mpy"
,
1154
},
1155
{
1156
.event_code = {0x12},
1157
.umask = 0x2,
1158
.event_name =
"simd_int_128.packed_shift"
,
1159
},
1160
{
1161
.event_code = {0x12},
1162
.umask = 0x40,
1163
.event_name =
"simd_int_128.shuffle_move"
,
1164
},
1165
{
1166
.event_code = {0x12},
1167
.umask = 0x8,
1168
.event_name =
"simd_int_128.unpack"
,
1169
},
1170
{
1171
.event_code = {0xFD},
1172
.umask = 0x4,
1173
.event_name =
"simd_int_64.pack"
,
1174
},
1175
{
1176
.event_code = {0xFD},
1177
.umask = 0x20,
1178
.event_name =
"simd_int_64.packed_arith"
,
1179
},
1180
{
1181
.event_code = {0xFD},
1182
.umask = 0x10,
1183
.event_name =
"simd_int_64.packed_logical"
,
1184
},
1185
{
1186
.event_code = {0xFD},
1187
.umask = 0x1,
1188
.event_name =
"simd_int_64.packed_mpy"
,
1189
},
1190
{
1191
.event_code = {0xFD},
1192
.umask = 0x2,
1193
.event_name =
"simd_int_64.packed_shift"
,
1194
},
1195
{
1196
.event_code = {0xFD},
1197
.umask = 0x40,
1198
.event_name =
"simd_int_64.shuffle_move"
,
1199
},
1200
{
1201
.event_code = {0xFD},
1202
.umask = 0x8,
1203
.event_name =
"simd_int_64.unpack"
,
1204
},
1205
{
1206
.event_code = {0xB8},
1207
.umask = 0x1,
1208
.event_name =
"snoop_response.hit"
,
1209
},
1210
{
1211
.event_code = {0xB8},
1212
.umask = 0x2,
1213
.event_name =
"snoop_response.hite"
,
1214
},
1215
{
1216
.event_code = {0xB8},
1217
.umask = 0x4,
1218
.event_name =
"snoop_response.hitm"
,
1219
},
1220
{
1221
.event_code = {0xB4},
1222
.umask = 0x4,
1223
.event_name =
"snoopq_requests.code"
,
1224
},
1225
{
1226
.event_code = {0xB4},
1227
.umask = 0x1,
1228
.event_name =
"snoopq_requests.data"
,
1229
},
1230
{
1231
.event_code = {0xB4},
1232
.umask = 0x2,
1233
.event_name =
"snoopq_requests.invalidate"
,
1234
},
1235
{
1236
.event_code = {0xB3},
1237
.umask = 0x4,
1238
.event_name =
"snoopq_requests_outstanding.code"
,
1239
},
1240
{
1241
.event_code = {0xB3},
1242
.umask = 0x4,
1243
.event_name =
"snoopq_requests_outstanding.code_not_empty"
,
1244
},
1245
{
1246
.event_code = {0xB3},
1247
.umask = 0x1,
1248
.event_name =
"snoopq_requests_outstanding.data"
,
1249
},
1250
{
1251
.event_code = {0xB3},
1252
.umask = 0x1,
1253
.event_name =
"snoopq_requests_outstanding.data_not_empty"
,
1254
},
1255
{
1256
.event_code = {0xB3},
1257
.umask = 0x2,
1258
.event_name =
"snoopq_requests_outstanding.invalidate"
,
1259
},
1260
{
1261
.event_code = {0xB3},
1262
.umask = 0x2,
1263
.event_name =
"snoopq_requests_outstanding.invalidate_not_empty"
,
1264
},
1265
{
1266
.event_code = {0xF6},
1267
.umask = 0x1,
1268
.event_name =
"sq_full_stall_cycles"
,
1269
},
1270
{
1271
.event_code = {0xF4},
1272
.umask = 0x4,
1273
.event_name =
"sq_misc.lru_hints"
,
1274
},
1275
{
1276
.event_code = {0xF4},
1277
.umask = 0x10,
1278
.event_name =
"sq_misc.split_lock"
,
1279
},
1280
{
1281
.event_code = {0xC7},
1282
.umask = 0x4,
1283
.event_name =
"ssex_uops_retired.packed_double"
,
1284
},
1285
{
1286
.event_code = {0xC7},
1287
.umask = 0x1,
1288
.event_name =
"ssex_uops_retired.packed_single"
,
1289
},
1290
{
1291
.event_code = {0xC7},
1292
.umask = 0x8,
1293
.event_name =
"ssex_uops_retired.scalar_double"
,
1294
},
1295
{
1296
.event_code = {0xC7},
1297
.umask = 0x2,
1298
.event_name =
"ssex_uops_retired.scalar_single"
,
1299
},
1300
{
1301
.event_code = {0xC7},
1302
.umask = 0x10,
1303
.event_name =
"ssex_uops_retired.vector_integer"
,
1304
},
1305
{
1306
.event_code = {0x6},
1307
.umask = 0x4,
1308
.event_name =
"store_blocks.at_ret"
,
1309
},
1310
{
1311
.event_code = {0x6},
1312
.umask = 0x8,
1313
.event_name =
"store_blocks.l1d_block"
,
1314
},
1315
{
1316
.event_code = {0x3C},
1317
.umask = 0x0,
1318
.event_name =
"cpu_clk_unhalted.thread_p"
,
1319
},
1320
{
1321
.event_code = {0x19},
1322
.umask = 0x1,
1323
.event_name =
"two_uop_insts_decoded"
,
1324
},
1325
{
1326
.event_code = {0xDB},
1327
.umask = 0x1,
1328
.event_name =
"uop_unfusion"
,
1329
},
1330
{
1331
.event_code = {0xD1},
1332
.umask = 0x4,
1333
.event_name =
"uops_decoded.esp_folding"
,
1334
},
1335
{
1336
.event_code = {0xD1},
1337
.umask = 0x8,
1338
.event_name =
"uops_decoded.esp_sync"
,
1339
},
1340
{
1341
.event_code = {0xD1},
1342
.umask = 0x2,
1343
.event_name =
"uops_decoded.ms_cycles_active"
,
1344
},
1345
{
1346
.event_code = {0xD1},
1347
.umask = 0x1,
1348
.event_name =
"uops_decoded.stall_cycles"
,
1349
},
1350
{
1351
.event_code = {0xB1},
1352
.umask = 0x3F,
1353
.event_name =
"uops_executed.core_active_cycles"
,
1354
},
1355
{
1356
.event_code = {0xB1},
1357
.umask = 0x1F,
1358
.event_name =
"uops_executed.core_active_cycles_no_port5"
,
1359
},
1360
{
1361
.event_code = {0xB1},
1362
.umask = 0x3F,
1363
.event_name =
"uops_executed.core_stall_count"
,
1364
},
1365
{
1366
.event_code = {0xB1},
1367
.umask = 0x1F,
1368
.event_name =
"uops_executed.core_stall_count_no_port5"
,
1369
},
1370
{
1371
.event_code = {0xB1},
1372
.umask = 0x3F,
1373
.event_name =
"uops_executed.core_stall_cycles"
,
1374
},
1375
{
1376
.event_code = {0xB1},
1377
.umask = 0x1F,
1378
.event_name =
"uops_executed.core_stall_cycles_no_port5"
,
1379
},
1380
{
1381
.event_code = {0xB1},
1382
.umask = 0x1,
1383
.event_name =
"uops_executed.port0"
,
1384
},
1385
{
1386
.event_code = {0xB1},
1387
.umask = 0x40,
1388
.event_name =
"uops_executed.port015"
,
1389
},
1390
{
1391
.event_code = {0xB1},
1392
.umask = 0x40,
1393
.event_name =
"uops_executed.port015_stall_cycles"
,
1394
},
1395
{
1396
.event_code = {0xB1},
1397
.umask = 0x2,
1398
.event_name =
"uops_executed.port1"
,
1399
},
1400
{
1401
.event_code = {0xB1},
1402
.umask = 0x4,
1403
.event_name =
"uops_executed.port2_core"
,
1404
},
1405
{
1406
.event_code = {0xB1},
1407
.umask = 0x80,
1408
.event_name =
"uops_executed.port234_core"
,
1409
},
1410
{
1411
.event_code = {0xB1},
1412
.umask = 0x8,
1413
.event_name =
"uops_executed.port3_core"
,
1414
},
1415
{
1416
.event_code = {0xB1},
1417
.umask = 0x10,
1418
.event_name =
"uops_executed.port4_core"
,
1419
},
1420
{
1421
.event_code = {0xB1},
1422
.umask = 0x20,
1423
.event_name =
"uops_executed.port5"
,
1424
},
1425
{
1426
.event_code = {0xE},
1427
.umask = 0x1,
1428
.event_name =
"uops_issued.any"
,
1429
},
1430
{
1431
.event_code = {0xE},
1432
.umask = 0x1,
1433
.event_name =
"uops_issued.core_stall_cycles"
,
1434
},
1435
{
1436
.event_code = {0xE},
1437
.umask = 0x1,
1438
.event_name =
"uops_issued.cycles_all_threads"
,
1439
},
1440
{
1441
.event_code = {0xE},
1442
.umask = 0x2,
1443
.event_name =
"uops_issued.fused"
,
1444
},
1445
{
1446
.event_code = {0xE},
1447
.umask = 0x1,
1448
.event_name =
"uops_issued.stall_cycles"
,
1449
},
1450
{
1451
.event_code = {0xC2},
1452
.umask = 0x1,
1453
.event_name =
"uops_retired.active_cycles"
,
1454
},
1455
{
1456
.event_code = {0xC2},
1457
.umask = 0x1,
1458
.event_name =
"uops_retired.any"
,
1459
},
1460
{
1461
.event_code = {0xC2},
1462
.umask = 0x4,
1463
.event_name =
"uops_retired.macro_fused"
,
1464
},
1465
{
1466
.event_code = {0xC2},
1467
.umask = 0x2,
1468
.event_name =
"uops_retired.retire_slots"
,
1469
},
1470
{
1471
.event_code = {0xC2},
1472
.umask = 0x1,
1473
.event_name =
"uops_retired.stall_cycles"
,
1474
},
1475
{
1476
.event_code = {0xC2},
1477
.umask = 0x1,
1478
.event_name =
"uops_retired.total_cycles"
,
1479
},
1480
{
1481
.event_code = {0xC0},
1482
.umask = 0x1,
1483
.event_name =
"inst_retired.total_cycles_ps"
,
1484
},
1485
{
1486
.event_name = 0,
1487
},
1488
};
1489
1490
PERFMON_REGISTER_INTEL_PMC
(
cpu_model_table
,
event_table
);
1491
PERFMON_REGISTER_INTEL_PMC
PERFMON_REGISTER_INTEL_PMC(cpu_model_table, event_table)
perfmon_intel_pmc_event_t::event_code
u8 event_code[2]
Definition:
perfmon_intel.h:26
perfmon_intel_pmc_event_t
Definition:
perfmon_intel.h:24
cpu_model_table
static perfmon_intel_pmc_cpu_model_t cpu_model_table[]
Definition:
perfmon_intel_wsm_ex.c:4
event_table
static perfmon_intel_pmc_event_t event_table[]
Definition:
perfmon_intel_wsm_ex.c:9
perfmon_intel_pmc_cpu_model_t
Definition:
perfmon_intel.h:35
perfmon_intel.h
extras
deprecated
perfmon
perfmon_intel_wsm_ex.c
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