|
FD.io VPP
v21.06-3-gbb25fbf28
Vector Packet Processing
|
Go to the documentation of this file.
42 #define _(a, b, c) if (rd->flags & (1 << a)) \
43 t = format (t, "%s%s", t ? " ":"", c);
55 char **strs = va_arg (*args,
char **);
56 u32 n_strs = va_arg (*args,
u32);
63 if (
i < n_strs && strs[
i] != 0)
66 s =
format (s,
" unknown(%u)",
i);
84 return format (s,
"ipv4-udp");
87 return format (s,
"ipv4-tcp");
90 return format (s,
"unknown(%x)", *rss4);
100 return format (s,
"ipv6");
102 return format (s,
"ipv6-udp");
105 return format (s,
"ipv6-tcp");
108 return format (s,
"unknown(%x)", *rss6);
143 if (rd->
flags & RDMA_DEVICE_F_MLX5DV)
145 struct mlx5dv_context
c = { };
146 const char *str_flags[7] = {
"cqe-v1",
"obsolete",
"mpw-allowed",
147 "enhanced-mpw",
"cqe-128b-comp",
"cqe-128b-pad",
148 "packet-based-credit-mode"
151 if (mlx5dv_query_device (rd->
ctx, &
c) != 0)
156 s =
format (s,
"\n%Udevice flags: %U",
173 char *l4_hdr_types[8] =
174 { 0,
"tcp",
"udp",
"tcp-empty-ack",
"tcp-with-acl" };
175 char *l3_hdr_types[4] = { 0,
"ip6",
"ip4" };
179 s =
format (s,
"rdma: %v (%d) next-node %U",
193 s =
format (s,
" ip-frag");
196 s =
format (s,
" %s", l3_hdr_types[l3_hdr_type]);
199 s =
format (s,
" %s", l4_hdr_types[l4_hdr_type]);
204 s =
format (s,
" ip4-ext-hdr");
206 s =
format (s,
" ip4-opt");
215 void *ptr = va_arg (*args,
void *);
217 u32 sb = va_arg (*args,
u32);
218 u32 eb = va_arg (*args,
u32);
220 if (sb == 63 && eb == 0)
223 return format (s,
"0x%lx", x);
229 s =
format (s,
" (0x%x)", x);
236 void *ptr = va_arg (*args,
void *);
238 u32 sb = va_arg (*args,
u32);
239 u32 eb = va_arg (*args,
u32);
240 char *
name = va_arg (*args,
char *);
258 void *cqe = va_arg (*args,
void *);
262 #define _(a, b, c, d) \
263 if (mlx5_get_bits (cqe, a, b, c)) \
264 s = format (s, "%U%U\n", \
265 format_white_space, line++ ? indent : 0, \
266 format_mlx5_field, cqe, a, b, c, #d);
276 u32 queue_index = va_arg (*args,
u32);
282 if (rd->
flags & RDMA_DEVICE_F_MLX5DV)
285 s =
format (s,
"\n%Uwq: stride %u wqe-cnt %u",
288 s =
format (s,
"\n%Ucq: cqn %u cqe-cnt %u ci %u",
static u64 mlx5_get_u64(void *start, int offset)
format_function_t format_vlib_pci_vpd
vlib_main_t vlib_node_runtime_t * node
#define CQE_FLAG_L4_HDR_TYPE(f)
vlib_main_t * vm
X-connect all packets from the HOST to the PHY.
#define foreach_cqe_rx_field
#define CQE_FLAG_L3_HDR_TYPE_IP6
#define CQE_FLAG_L3_HDR_TYPE(f)
__clib_export u8 * format_clib_error(u8 *s, va_list *va)
#define CQE_FLAG_IP_EXT_OPTS
#define CQE_FLAG_L3_HDR_TYPE_IP4
vlib_pci_device_info_t * pci
#define vec_elt_at_index(v, i)
Get vector value at index i checking that i is in bounds.
static vnet_hw_interface_t * vnet_get_hw_interface(vnet_main_t *vnm, u32 hw_if_index)
vnet_main_t * vnet_get_main(void)
@ foreach_rdma_device_flags
sll srl srl sll sra u16x4 i
format_function_t format_vlib_next_node_name
vlib_pci_device_info_t * vlib_pci_get_device_info(vlib_main_t *vm, vlib_pci_addr_t *addr, clib_error_t **error)
#define vec_free(V)
Free vector's memory (no header).
template key/value backing page structure
format_function_t format_vlib_pci_addr
static u32 mlx5_get_bits(void *start, int offset, int first, int last)
static vlib_main_t * vlib_get_main(void)
static void vlib_pci_free_device_info(vlib_pci_device_info_t *di)
vl_api_wireguard_peer_flags_t flags