FD.io VPP
v21.06-3-gbb25fbf28
Vector Packet Processing
perfmon_intel_clx.c
Go to the documentation of this file.
1
2
#include <
perfmon/perfmon_intel.h
>
3
4
static
perfmon_intel_pmc_cpu_model_t
cpu_model_table
[] = {
5
{0x55, 0x05, 1},
6
{0x55, 0x06, 1},
7
{0x55, 0x07, 1},
8
{0x55, 0x08, 1},
9
{0x55, 0x09, 1},
10
{0x55, 0x0A, 1},
11
{0x55, 0x0B, 1},
12
{0x55, 0x0C, 1},
13
{0x55, 0x0D, 1},
14
{0x55, 0x0E, 1},
15
{0x55, 0x0F, 1},
16
17
};
18
19
static
perfmon_intel_pmc_event_t
event_table
[] = {
20
{
21
.
event_code
= {0x00},
22
.umask = 0x01,
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.event_name =
"inst_retired.any"
,
24
},
25
{
26
.event_code = {0x00},
27
.umask = 0x02,
28
.event_name =
"cpu_clk_unhalted.thread"
,
29
},
30
{
31
.event_code = {0x00},
32
.umask = 0x02,
33
.event_name =
"cpu_clk_unhalted.thread_any"
,
34
},
35
{
36
.event_code = {0x00},
37
.umask = 0x03,
38
.event_name =
"cpu_clk_unhalted.ref_tsc"
,
39
},
40
{
41
.event_code = {0x03},
42
.umask = 0x02,
43
.event_name =
"ld_blocks.store_forward"
,
44
},
45
{
46
.event_code = {0x03},
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.umask = 0x08,
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.event_name =
"ld_blocks.no_sr"
,
49
},
50
{
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.event_code = {0x07},
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.umask = 0x01,
53
.event_name =
"ld_blocks_partial.address_alias"
,
54
},
55
{
56
.event_code = {0x08},
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.umask = 0x01,
58
.event_name =
"dtlb_load_misses.miss_causes_a_walk"
,
59
},
60
{
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.event_code = {0x08},
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.umask = 0x02,
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.event_name =
"dtlb_load_misses.walk_completed_4k"
,
64
},
65
{
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.event_code = {0x08},
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.umask = 0x04,
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.event_name =
"dtlb_load_misses.walk_completed_2m_4m"
,
69
},
70
{
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.event_code = {0x08},
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.umask = 0x08,
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.event_name =
"dtlb_load_misses.walk_completed_1g"
,
74
},
75
{
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.event_code = {0x08},
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.umask = 0x0E,
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.event_name =
"dtlb_load_misses.walk_completed"
,
79
},
80
{
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.event_code = {0x08},
82
.umask = 0x10,
83
.event_name =
"dtlb_load_misses.walk_pending"
,
84
},
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{
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.event_code = {0x08},
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.umask = 0x20,
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.event_name =
"dtlb_load_misses.stlb_hit"
,
89
},
90
{
91
.event_code = {0x09},
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.umask = 0x01,
93
.event_name =
"memory_disambiguation.history_reset"
,
94
},
95
{
96
.event_code = {0x0D},
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.umask = 0x01,
98
.event_name =
"int_misc.recovery_cycles"
,
99
},
100
{
101
.event_code = {0x0D},
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.umask = 0x01,
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.event_name =
"int_misc.recovery_cycles_any"
,
104
},
105
{
106
.event_code = {0x0D},
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.umask = 0x80,
108
.event_name =
"int_misc.clear_resteer_cycles"
,
109
},
110
{
111
.event_code = {0x0E},
112
.umask = 0x01,
113
.event_name =
"uops_issued.stall_cycles"
,
114
},
115
{
116
.event_code = {0x0E},
117
.umask = 0x01,
118
.event_name =
"uops_issued.any"
,
119
},
120
{
121
.event_code = {0x0E},
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.umask = 0x20,
123
.event_name =
"uops_issued.slow_lea"
,
124
},
125
{
126
.event_code = {0x14},
127
.umask = 0x01,
128
.event_name =
"arith.divider_active"
,
129
},
130
{
131
.event_code = {0x24},
132
.umask = 0x21,
133
.event_name =
"l2_rqsts.demand_data_rd_miss"
,
134
},
135
{
136
.event_code = {0x24},
137
.umask = 0x22,
138
.event_name =
"l2_rqsts.rfo_miss"
,
139
},
140
{
141
.event_code = {0x24},
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.umask = 0x24,
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.event_name =
"l2_rqsts.code_rd_miss"
,
144
},
145
{
146
.event_code = {0x24},
147
.umask = 0x27,
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.event_name =
"l2_rqsts.all_demand_miss"
,
149
},
150
{
151
.event_code = {0x24},
152
.umask = 0x38,
153
.event_name =
"l2_rqsts.pf_miss"
,
154
},
155
{
156
.event_code = {0x24},
157
.umask = 0x3F,
158
.event_name =
"l2_rqsts.miss"
,
159
},
160
{
161
.event_code = {0x24},
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.umask = 0xc1,
163
.event_name =
"l2_rqsts.demand_data_rd_hit"
,
164
},
165
{
166
.event_code = {0x24},
167
.umask = 0xc2,
168
.event_name =
"l2_rqsts.rfo_hit"
,
169
},
170
{
171
.event_code = {0x24},
172
.umask = 0xc4,
173
.event_name =
"l2_rqsts.code_rd_hit"
,
174
},
175
{
176
.event_code = {0x24},
177
.umask = 0xd8,
178
.event_name =
"l2_rqsts.pf_hit"
,
179
},
180
{
181
.event_code = {0x24},
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.umask = 0xE1,
183
.event_name =
"l2_rqsts.all_demand_data_rd"
,
184
},
185
{
186
.event_code = {0x24},
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.umask = 0xE2,
188
.event_name =
"l2_rqsts.all_rfo"
,
189
},
190
{
191
.event_code = {0x24},
192
.umask = 0xE4,
193
.event_name =
"l2_rqsts.all_code_rd"
,
194
},
195
{
196
.event_code = {0x24},
197
.umask = 0xe7,
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.event_name =
"l2_rqsts.all_demand_references"
,
199
},
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{
201
.event_code = {0x24},
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.umask = 0xF8,
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.event_name =
"l2_rqsts.all_pf"
,
204
},
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{
206
.event_code = {0x24},
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.umask = 0xFF,
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.event_name =
"l2_rqsts.references"
,
209
},
210
{
211
.event_code = {0x28},
212
.umask = 0x07,
213
.event_name =
"core_power.lvl0_turbo_license"
,
214
},
215
{
216
.event_code = {0x28},
217
.umask = 0x18,
218
.event_name =
"core_power.lvl1_turbo_license"
,
219
},
220
{
221
.event_code = {0x28},
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.umask = 0x20,
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.event_name =
"core_power.lvl2_turbo_license"
,
224
},
225
{
226
.event_code = {0x28},
227
.umask = 0x40,
228
.event_name =
"core_power.throttle"
,
229
},
230
{
231
.event_code = {0x2E},
232
.umask = 0x41,
233
.event_name =
"longest_lat_cache.miss"
,
234
},
235
{
236
.event_code = {0x2E},
237
.umask = 0x4F,
238
.event_name =
"longest_lat_cache.reference"
,
239
},
240
{
241
.event_code = {0x32},
242
.umask = 0x01,
243
.event_name =
"sw_prefetch_access.nta"
,
244
},
245
{
246
.event_code = {0x32},
247
.umask = 0x02,
248
.event_name =
"sw_prefetch_access.t0"
,
249
},
250
{
251
.event_code = {0x32},
252
.umask = 0x04,
253
.event_name =
"sw_prefetch_access.t1_t2"
,
254
},
255
{
256
.event_code = {0x32},
257
.umask = 0x08,
258
.event_name =
"sw_prefetch_access.prefetchw"
,
259
},
260
{
261
.event_code = {0x3C},
262
.umask = 0x00,
263
.event_name =
"cpu_clk_unhalted.thread_p"
,
264
},
265
{
266
.event_code = {0x3C},
267
.umask = 0x00,
268
.event_name =
"cpu_clk_unhalted.thread_p_any"
,
269
},
270
{
271
.event_code = {0x3C},
272
.umask = 0x00,
273
.event_name =
"cpu_clk_unhalted.ring0_trans"
,
274
},
275
{
276
.event_code = {0x3C},
277
.umask = 0x01,
278
.event_name =
"cpu_clk_thread_unhalted.ref_xclk"
,
279
},
280
{
281
.event_code = {0x3C},
282
.umask = 0x01,
283
.event_name =
"cpu_clk_thread_unhalted.ref_xclk_any"
,
284
},
285
{
286
.event_code = {0x3C},
287
.umask = 0x01,
288
.event_name =
"cpu_clk_unhalted.ref_xclk_any"
,
289
},
290
{
291
.event_code = {0x3C},
292
.umask = 0x01,
293
.event_name =
"cpu_clk_unhalted.ref_xclk"
,
294
},
295
{
296
.event_code = {0x3C},
297
.umask = 0x02,
298
.event_name =
"cpu_clk_thread_unhalted.one_thread_active"
,
299
},
300
{
301
.event_code = {0x48},
302
.umask = 0x01,
303
.event_name =
"l1d_pend_miss.pending_cycles"
,
304
},
305
{
306
.event_code = {0x48},
307
.umask = 0x01,
308
.event_name =
"l1d_pend_miss.pending"
,
309
},
310
{
311
.event_code = {0x48},
312
.umask = 0x02,
313
.event_name =
"l1d_pend_miss.fb_full"
,
314
},
315
{
316
.event_code = {0x49},
317
.umask = 0x01,
318
.event_name =
"dtlb_store_misses.miss_causes_a_walk"
,
319
},
320
{
321
.event_code = {0x49},
322
.umask = 0x02,
323
.event_name =
"dtlb_store_misses.walk_completed_4k"
,
324
},
325
{
326
.event_code = {0x49},
327
.umask = 0x04,
328
.event_name =
"dtlb_store_misses.walk_completed_2m_4m"
,
329
},
330
{
331
.event_code = {0x49},
332
.umask = 0x08,
333
.event_name =
"dtlb_store_misses.walk_completed_1g"
,
334
},
335
{
336
.event_code = {0x49},
337
.umask = 0x0E,
338
.event_name =
"dtlb_store_misses.walk_completed"
,
339
},
340
{
341
.event_code = {0x49},
342
.umask = 0x10,
343
.event_name =
"dtlb_store_misses.walk_pending"
,
344
},
345
{
346
.event_code = {0x49},
347
.umask = 0x20,
348
.event_name =
"dtlb_store_misses.stlb_hit"
,
349
},
350
{
351
.event_code = {0x4C},
352
.umask = 0x01,
353
.event_name =
"load_hit_pre.sw_pf"
,
354
},
355
{
356
.event_code = {0x4F},
357
.umask = 0x10,
358
.event_name =
"ept.walk_pending"
,
359
},
360
{
361
.event_code = {0x51},
362
.umask = 0x01,
363
.event_name =
"l1d.replacement"
,
364
},
365
{
366
.event_code = {0x54},
367
.umask = 0x01,
368
.event_name =
"tx_mem.abort_conflict"
,
369
},
370
{
371
.event_code = {0x54},
372
.umask = 0x02,
373
.event_name =
"tx_mem.abort_capacity"
,
374
},
375
{
376
.event_code = {0x54},
377
.umask = 0x04,
378
.event_name =
"tx_mem.abort_hle_store_to_elided_lock"
,
379
},
380
{
381
.event_code = {0x54},
382
.umask = 0x08,
383
.event_name =
"tx_mem.abort_hle_elision_buffer_not_empty"
,
384
},
385
{
386
.event_code = {0x54},
387
.umask = 0x10,
388
.event_name =
"tx_mem.abort_hle_elision_buffer_mismatch"
,
389
},
390
{
391
.event_code = {0x54},
392
.umask = 0x20,
393
.event_name =
"tx_mem.abort_hle_elision_buffer_unsupported_alignment"
,
394
},
395
{
396
.event_code = {0x54},
397
.umask = 0x40,
398
.event_name =
"tx_mem.hle_elision_buffer_full"
,
399
},
400
{
401
.event_code = {0x59},
402
.umask = 0x01,
403
.event_name =
"partial_rat_stalls.scoreboard"
,
404
},
405
{
406
.event_code = {0x5d},
407
.umask = 0x01,
408
.event_name =
"tx_exec.misc1"
,
409
},
410
{
411
.event_code = {0x5d},
412
.umask = 0x02,
413
.event_name =
"tx_exec.misc2"
,
414
},
415
{
416
.event_code = {0x5d},
417
.umask = 0x04,
418
.event_name =
"tx_exec.misc3"
,
419
},
420
{
421
.event_code = {0x5d},
422
.umask = 0x08,
423
.event_name =
"tx_exec.misc4"
,
424
},
425
{
426
.event_code = {0x5d},
427
.umask = 0x10,
428
.event_name =
"tx_exec.misc5"
,
429
},
430
{
431
.event_code = {0x5E},
432
.umask = 0x01,
433
.event_name =
"rs_events.empty_end"
,
434
},
435
{
436
.event_code = {0x5E},
437
.umask = 0x01,
438
.event_name =
"rs_events.empty_cycles"
,
439
},
440
{
441
.event_code = {0x60},
442
.umask = 0x01,
443
.event_name =
"offcore_requests_outstanding.cycles_with_demand_data_rd"
,
444
},
445
{
446
.event_code = {0x60},
447
.umask = 0x01,
448
.event_name =
"offcore_requests_outstanding.demand_data_rd"
,
449
},
450
{
451
.event_code = {0x60},
452
.umask = 0x02,
453
.event_name =
"offcore_requests_outstanding.demand_code_rd"
,
454
},
455
{
456
.event_code = {0x60},
457
.umask = 0x02,
458
.event_name =
"offcore_requests_outstanding.cycles_with_demand_code_rd"
,
459
},
460
{
461
.event_code = {0x60},
462
.umask = 0x04,
463
.event_name =
"offcore_requests_outstanding.demand_rfo"
,
464
},
465
{
466
.event_code = {0x60},
467
.umask = 0x04,
468
.event_name =
"offcore_requests_outstanding.cycles_with_demand_rfo"
,
469
},
470
{
471
.event_code = {0x60},
472
.umask = 0x08,
473
.event_name =
"offcore_requests_outstanding.cycles_with_data_rd"
,
474
},
475
{
476
.event_code = {0x60},
477
.umask = 0x08,
478
.event_name =
"offcore_requests_outstanding.all_data_rd"
,
479
},
480
{
481
.event_code = {0x60},
482
.umask = 0x10,
483
.event_name =
"offcore_requests_outstanding.l3_miss_demand_data_rd"
,
484
},
485
{
486
.event_code = {0x79},
487
.umask = 0x04,
488
.event_name =
"idq.mite_cycles"
,
489
},
490
{
491
.event_code = {0x79},
492
.umask = 0x04,
493
.event_name =
"idq.mite_uops"
,
494
},
495
{
496
.event_code = {0x79},
497
.umask = 0x08,
498
.event_name =
"idq.dsb_cycles"
,
499
},
500
{
501
.event_code = {0x79},
502
.umask = 0x08,
503
.event_name =
"idq.dsb_uops"
,
504
},
505
{
506
.event_code = {0x79},
507
.umask = 0x10,
508
.event_name =
"idq.ms_dsb_cycles"
,
509
},
510
{
511
.event_code = {0x79},
512
.umask = 0x18,
513
.event_name =
"idq.all_dsb_cycles_any_uops"
,
514
},
515
{
516
.event_code = {0x79},
517
.umask = 0x18,
518
.event_name =
"idq.all_dsb_cycles_4_uops"
,
519
},
520
{
521
.event_code = {0x79},
522
.umask = 0x20,
523
.event_name =
"idq.ms_mite_uops"
,
524
},
525
{
526
.event_code = {0x79},
527
.umask = 0x24,
528
.event_name =
"idq.all_mite_cycles_any_uops"
,
529
},
530
{
531
.event_code = {0x79},
532
.umask = 0x24,
533
.event_name =
"idq.all_mite_cycles_4_uops"
,
534
},
535
{
536
.event_code = {0x79},
537
.umask = 0x30,
538
.event_name =
"idq.ms_cycles"
,
539
},
540
{
541
.event_code = {0x79},
542
.umask = 0x30,
543
.event_name =
"idq.ms_uops"
,
544
},
545
{
546
.event_code = {0x79},
547
.umask = 0x30,
548
.event_name =
"idq.ms_switches"
,
549
},
550
{
551
.event_code = {0x80},
552
.umask = 0x04,
553
.event_name =
"icache_16b.ifdata_stall"
,
554
},
555
{
556
.event_code = {0x83},
557
.umask = 0x01,
558
.event_name =
"icache_64b.iftag_hit"
,
559
},
560
{
561
.event_code = {0x83},
562
.umask = 0x02,
563
.event_name =
"icache_64b.iftag_miss"
,
564
},
565
{
566
.event_code = {0x83},
567
.umask = 0x04,
568
.event_name =
"icache_64b.iftag_stall"
,
569
},
570
{
571
.event_code = {0x85},
572
.umask = 0x01,
573
.event_name =
"itlb_misses.miss_causes_a_walk"
,
574
},
575
{
576
.event_code = {0x85},
577
.umask = 0x02,
578
.event_name =
"itlb_misses.walk_completed_4k"
,
579
},
580
{
581
.event_code = {0x85},
582
.umask = 0x04,
583
.event_name =
"itlb_misses.walk_completed_2m_4m"
,
584
},
585
{
586
.event_code = {0x85},
587
.umask = 0x08,
588
.event_name =
"itlb_misses.walk_completed_1g"
,
589
},
590
{
591
.event_code = {0x85},
592
.umask = 0x0E,
593
.event_name =
"itlb_misses.walk_completed"
,
594
},
595
{
596
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597
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599
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{
601
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602
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603
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604
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606
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607
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609
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611
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612
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614
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{
616
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618
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619
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620
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621
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622
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629
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631
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656
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661
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666
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671
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676
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681
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684
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686
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691
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696
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704
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714
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731
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761
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784
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786
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814
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821
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841
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884
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886
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889
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899
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904
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909
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914
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916
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918
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919
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921
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924
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929
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934
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939
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941
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944
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954
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956
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971
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974
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981
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984
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986
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991
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1009
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1014
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1016
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1019
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1021
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1024
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1026
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1029
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1031
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1034
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1039
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1044
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1049
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1054
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1056
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1059
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1064
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1066
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1069
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1074
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1076
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1081
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1084
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1094
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1096
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1101
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1104
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1106
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1109
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1114
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1116
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1119
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1121
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1122
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1124
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1125
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1126
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1127
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1129
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1130
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1131
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1132
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1134
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1135
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1136
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1137
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1138
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1139
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1141
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1144
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1146
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1147
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1149
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1150
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1151
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1153
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1154
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1155
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1156
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1157
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1158
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1159
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1160
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1161
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1162
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1164
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1165
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1166
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1167
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1169
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1170
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1171
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1172
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1173
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1174
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1175
{
1176
.event_code = {0xD0},
1177
.umask = 0x81,
1178
.event_name =
"mem_inst_retired.all_loads"
,
1179
},
1180
{
1181
.event_code = {0xD0},
1182
.umask = 0x82,
1183
.event_name =
"mem_inst_retired.all_stores"
,
1184
},
1185
{
1186
.event_code = {0xD1},
1187
.umask = 0x01,
1188
.event_name =
"mem_load_retired.l1_hit"
,
1189
},
1190
{
1191
.event_code = {0xD1},
1192
.umask = 0x02,
1193
.event_name =
"mem_load_retired.l2_hit"
,
1194
},
1195
{
1196
.event_code = {0xD1},
1197
.umask = 0x04,
1198
.event_name =
"mem_load_retired.l3_hit"
,
1199
},
1200
{
1201
.event_code = {0xD1},
1202
.umask = 0x08,
1203
.event_name =
"mem_load_retired.l1_miss"
,
1204
},
1205
{
1206
.event_code = {0xD1},
1207
.umask = 0x10,
1208
.event_name =
"mem_load_retired.l2_miss"
,
1209
},
1210
{
1211
.event_code = {0xD1},
1212
.umask = 0x20,
1213
.event_name =
"mem_load_retired.l3_miss"
,
1214
},
1215
{
1216
.event_code = {0xD1},
1217
.umask = 0x40,
1218
.event_name =
"mem_load_retired.fb_hit"
,
1219
},
1220
{
1221
.event_code = {0xD1},
1222
.umask = 0x80,
1223
.event_name =
"mem_load_retired.local_pmm"
,
1224
},
1225
{
1226
.event_code = {0xD2},
1227
.umask = 0x01,
1228
.event_name =
"mem_load_l3_hit_retired.xsnp_miss"
,
1229
},
1230
{
1231
.event_code = {0xD2},
1232
.umask = 0x02,
1233
.event_name =
"mem_load_l3_hit_retired.xsnp_hit"
,
1234
},
1235
{
1236
.event_code = {0xD2},
1237
.umask = 0x04,
1238
.event_name =
"mem_load_l3_hit_retired.xsnp_hitm"
,
1239
},
1240
{
1241
.event_code = {0xD2},
1242
.umask = 0x08,
1243
.event_name =
"mem_load_l3_hit_retired.xsnp_none"
,
1244
},
1245
{
1246
.event_code = {0xD3},
1247
.umask = 0x01,
1248
.event_name =
"mem_load_l3_miss_retired.local_dram"
,
1249
},
1250
{
1251
.event_code = {0xD3},
1252
.umask = 0x02,
1253
.event_name =
"mem_load_l3_miss_retired.remote_dram"
,
1254
},
1255
{
1256
.event_code = {0xD3},
1257
.umask = 0x04,
1258
.event_name =
"mem_load_l3_miss_retired.remote_hitm"
,
1259
},
1260
{
1261
.event_code = {0xD3},
1262
.umask = 0x08,
1263
.event_name =
"mem_load_l3_miss_retired.remote_fwd"
,
1264
},
1265
{
1266
.event_code = {0xD3},
1267
.umask = 0x10,
1268
.event_name =
"mem_load_l3_miss_retired.remote_pmm"
,
1269
},
1270
{
1271
.event_code = {0xD4},
1272
.umask = 0x04,
1273
.event_name =
"mem_load_misc_retired.uc"
,
1274
},
1275
{
1276
.event_code = {0xE6},
1277
.umask = 0x01,
1278
.event_name =
"baclears.any"
,
1279
},
1280
{
1281
.event_code = {0xEF},
1282
.umask = 0x01,
1283
.event_name =
"core_snoop_response.rsp_ihiti"
,
1284
},
1285
{
1286
.event_code = {0xEF},
1287
.umask = 0x02,
1288
.event_name =
"core_snoop_response.rsp_ihitfse"
,
1289
},
1290
{
1291
.event_code = {0xEF},
1292
.umask = 0x04,
1293
.event_name =
"core_snoop_response.rsp_shitfse"
,
1294
},
1295
{
1296
.event_code = {0xEF},
1297
.umask = 0x08,
1298
.event_name =
"core_snoop_response.rsp_sfwdm"
,
1299
},
1300
{
1301
.event_code = {0xEF},
1302
.umask = 0x10,
1303
.event_name =
"core_snoop_response.rsp_ifwdm"
,
1304
},
1305
{
1306
.event_code = {0xEF},
1307
.umask = 0x20,
1308
.event_name =
"core_snoop_response.rsp_ifwdfe"
,
1309
},
1310
{
1311
.event_code = {0xEF},
1312
.umask = 0x40,
1313
.event_name =
"core_snoop_response.rsp_sfwdfe"
,
1314
},
1315
{
1316
.event_code = {0xF0},
1317
.umask = 0x40,
1318
.event_name =
"l2_trans.l2_wb"
,
1319
},
1320
{
1321
.event_code = {0xF1},
1322
.umask = 0x1F,
1323
.event_name =
"l2_lines_in.all"
,
1324
},
1325
{
1326
.event_code = {0xF2},
1327
.umask = 0x01,
1328
.event_name =
"l2_lines_out.silent"
,
1329
},
1330
{
1331
.event_code = {0xF2},
1332
.umask = 0x02,
1333
.event_name =
"l2_lines_out.non_silent"
,
1334
},
1335
{
1336
.event_code = {0xF2},
1337
.umask = 0x04,
1338
.event_name =
"l2_lines_out.useless_pref"
,
1339
},
1340
{
1341
.event_code = {0xF2},
1342
.umask = 0x04,
1343
.event_name =
"l2_lines_out.useless_hwpf"
,
1344
},
1345
{
1346
.event_code = {0xF4},
1347
.umask = 0x10,
1348
.event_name =
"sq_misc.split_lock"
,
1349
},
1350
{
1351
.event_code = {0xFE},
1352
.umask = 0x02,
1353
.event_name =
"idi_misc.wb_upgrade"
,
1354
},
1355
{
1356
.event_code = {0xFE},
1357
.umask = 0x04,
1358
.event_name =
"idi_misc.wb_downgrade"
,
1359
},
1360
{
1361
.event_name = 0,
1362
},
1363
};
1364
1365
PERFMON_REGISTER_INTEL_PMC
(
cpu_model_table
,
event_table
);
1366
cpu_model_table
static perfmon_intel_pmc_cpu_model_t cpu_model_table[]
Definition:
perfmon_intel_clx.c:4
perfmon_intel_pmc_event_t::event_code
u8 event_code[2]
Definition:
perfmon_intel.h:26
PERFMON_REGISTER_INTEL_PMC
PERFMON_REGISTER_INTEL_PMC(cpu_model_table, event_table)
perfmon_intel_pmc_event_t
Definition:
perfmon_intel.h:24
event_table
static perfmon_intel_pmc_event_t event_table[]
Definition:
perfmon_intel_clx.c:19
perfmon_intel_pmc_cpu_model_t
Definition:
perfmon_intel.h:35
perfmon_intel.h
extras
deprecated
perfmon
perfmon_intel_clx.c
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