44 #include <sys/types.h> 48 #include <sys/ioctl.h> 50 #include <linux/ethtool.h> 51 #include <linux/sockios.h> 75 "Address",
"Socket",
"VID:PID",
"Link Speed",
"Driver",
80 c = &d->config0.header;
82 if (c->device_class != PCI_CLASS_NETWORK_ETHERNET && !show_all)
87 if (d->numa_node >= 0)
88 s = format (s,
" %d", d->numa_node);
90 vlib_cli_output (vm,
"%-13U%-7v%04x:%04x %-15U%-20s%-40v",
91 format_vlib_pci_addr, &d->bus_address, s,
92 c->vendor_id, c->device_id,
93 format_vlib_pci_link_speed, d,
94 d->driver_name ? (char *) d->driver_name :
"",
106 vlib_pci_addr_t *
addr = va_arg (*args, vlib_pci_addr_t *);
109 if (!
unformat (input,
"%x:%x:%x.%x", &x[0], &x[1], &x[2], &x[3]))
115 addr->function = x[3];
123 vlib_pci_addr_t *
addr = va_arg (*va, vlib_pci_addr_t *);
124 return format (s,
"%04x:%02x:%02x.%x", addr->domain, addr->bus,
125 addr->slot, addr->function);
131 vlib_pci_addr_t *
addr = va_arg (*va, vlib_pci_addr_t *);
132 return format (s,
"%x/%x/%x", addr->bus, addr->slot, addr->function);
139 pcie_config_regs_t *r =
144 return format (s,
"unknown");
146 width = (r->link_status >> 4) & 0x3f;
148 if ((r->link_status & 0xf) == 1)
149 return format (s,
"2.5 GT/s x%u", width);
150 if ((r->link_status & 0xf) == 2)
151 return format (s,
"5.0 GT/s x%u", width);
152 if ((r->link_status & 0xf) == 3)
153 return format (s,
"8.0 GT/s x%u", width);
154 return format (s,
"unknown");
161 .short_help =
"show pci [all]",
clib_error_t * pci_bus_init(vlib_main_t *vm)
static void * pci_config_find_capability(pci_config_type0_regs_t *t, int cap_type)
u8 * format_vlib_pci_link_speed(u8 *s, va_list *va)
#define pool_foreach(VAR, POOL, BODY)
Iterate through pool.
#define VLIB_INIT_FUNCTION(x)
vlib_pci_device_t * pci_devs
static clib_error_t * show_pci_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
void vlib_cli_output(vlib_main_t *vm, char *fmt,...)
uword unformat_vlib_pci_addr(unformat_input_t *input, va_list *args)
#define vec_free(V)
Free vector's memory (no header).
pci_config_type0_regs_t config0
u8 * format_vlib_pci_addr(u8 *s, va_list *va)
VLIB_CLI_COMMAND(set_interface_ip_source_and_port_range_check_command, static)
u8 * format_vlib_pci_handle(u8 *s, va_list *va)
#define clib_error_return(e, args...)