48 struct rte_eth_dev_info dev_info;
49 struct rte_pci_device *pci_dev;
54 if (hw_if_index == (
u32) ~ 0)
69 rte_eth_dev_info_get ((*xd)->port_id, &dev_info);
75 vlib_pci_addr_t pci_addr;
77 pci_addr.domain = pci_dev->addr.domain;
78 pci_addr.bus = pci_dev->addr.bus;
79 pci_addr.slot = pci_dev->addr.devid;
80 pci_addr.function = pci_dev->addr.function;
100 #define PCAP_DEF_PKT_TO_CAPTURE (100) 105 u8 *chroot_filename = 0;
130 else if (
unformat (line_input,
"off"))
135 (vm,
"captured %d pkts...",
158 else if (
unformat (line_input,
"max %d", &max))
164 "can't change max value while pcap tx capture active...");
170 else if (
unformat (line_input,
"intfc %U",
175 else if (
unformat (line_input,
"intfc any"))
179 else if (
unformat (line_input,
"file %s", &filename))
184 (vm,
"can't change file while pcap tx capture active...");
190 if (strstr ((
char *) filename,
"..")
191 || index ((
char *) filename,
'/'))
201 chroot_filename =
format (0,
"/tmp/%s%c", filename, 0);
204 else if (
unformat (line_input,
"status"))
209 (vm,
"max is %d for any interface to file %s",
215 (
u8 *)
"/tmp/vpe.pcap");
234 (rx_tx ==
VLIB_RX) ?
"rx" :
"tx");
239 (rx_tx ==
VLIB_RX) ?
"rx" :
"tx",
276 = (
char *)
format (0,
"/tmp/vpe.pcap%c", 0);
284 rx_tx ==
VLIB_RX ?
"rx" :
"tx");
287 else if (chroot_filename)
366 .path =
"pcap tx trace",
368 "pcap tx trace [on|off] [max <nn>] [intfc <interface>|any] [file <name>] [status]",
372 .path =
"pcap rx trace",
374 "pcap rx trace [on|off] [max <nn>] [intfc <interface>|any] [file <name>] [status]",
384 struct rte_mempool *rmp;
392 unsigned count = rte_mempool_avail_count (rmp);
393 unsigned free_count = rte_mempool_in_use_count (rmp);
396 "name=\"%s\" available = %7d allocated = %7d total = %7d\n",
398 (
u32) (count + free_count));
419 .path =
"show dpdk buffer",
420 .short_help =
"show dpdk buffer",
437 err =
clib_sysfs_read (
"/proc/sys/fs/pipe-max-size",
"%u", &pipe_max_size);
442 if (pipe (fds) == -1)
446 #define F_SETPIPE_SZ (1024 + 7) 455 if (fcntl (fds[0], F_SETFL, O_NONBLOCK) == -1)
461 if ((f = fdopen (fds[1],
"a")) == 0)
467 rte_dump_physmem_layout (f);
476 n = read (fds[0], s + len, n_try);
477 if (n < 0 && errno != EAGAIN)
482 _vec_len (s) = len + (n < 0 ? 0 : n);
504 .path =
"show dpdk physmem",
505 .short_help =
"show dpdk physmem",
515 static u32 *allocated_buffers;
522 if (
unformat (input,
"allocate %d", &n_alloc))
524 else if (
unformat (input,
"free %d", &n_free))
532 if (
vec_len (allocated_buffers) < n_free)
534 n_free,
vec_len (allocated_buffers));
536 first =
vec_len (allocated_buffers) - n_free;
538 _vec_len (allocated_buffers) =
first;
542 first =
vec_len (allocated_buffers);
544 vec_len (allocated_buffers) + n_alloc - 1);
548 _vec_len (allocated_buffers) = first + actual_alloc;
550 if (actual_alloc < n_alloc)
558 if (allocated_buffers &&
vec_len (allocated_buffers) == 0)
592 .path =
"test dpdk buffer",
593 .short_help =
"test dpdk buffer [allocate <nn>] [free <nn>]",
607 u32 hw_if_index = (
u32) ~ 0;
608 u32 nb_rx_desc = (
u32) ~ 0;
609 u32 nb_tx_desc = (
u32) ~ 0;
621 else if (
unformat (line_input,
"tx %d", &nb_tx_desc))
623 else if (
unformat (line_input,
"rx %d", &nb_rx_desc))
633 if (hw_if_index == (
u32) ~ 0)
642 if ((xd->
flags & DPDK_DEVICE_FLAG_PMD) == 0)
646 "number of descriptors can be set only for " 651 if ((nb_rx_desc == (
u32) ~ 0 || nb_rx_desc == xd->
nb_rx_desc) &&
658 if (nb_rx_desc != (
u32) ~ 0)
661 if (nb_tx_desc != (
u32) ~ 0)
687 .path =
"set dpdk interface descriptors",
688 .short_help =
"set dpdk interface descriptors <interface> [rx <nn>] [tx <nn>]",
758 .path =
"show dpdk interface hqos placement",
759 .short_help =
"show dpdk interface hqos placement",
773 u32 hw_if_index = (
u32) ~ 0;
787 else if (
unformat (line_input,
"thread %d", &cpu))
797 if (hw_if_index == (
u32) ~ 0)
800 if (cpu < dm->hqos_cpu_first_index ||
863 .path =
"set dpdk interface hqos placement",
864 .short_help =
"set dpdk interface hqos placement <interface> thread <n>",
877 u32 hw_if_index = (
u32) ~ 0;
878 u32 subport_id = (
u32) ~ 0;
880 u32 profile_id = (
u32) ~ 0;
893 else if (
unformat (line_input,
"subport %d", &subport_id))
895 else if (
unformat (line_input,
"pipe %d", &pipe_id))
897 else if (
unformat (line_input,
"profile %d", &profile_id))
907 if (hw_if_index == (
u32) ~ 0)
917 rte_sched_pipe_config (xd->
hqos_ht->
hqos, subport_id, pipe_id,
950 .path =
"set dpdk interface hqos pipe",
951 .short_help =
"set dpdk interface hqos pipe <interface> subport <subport_id> pipe <pipe_id> " 952 "profile <profile_id>",
964 u32 hw_if_index = (
u32) ~ 0;
965 u32 subport_id = (
u32) ~ 0;
966 struct rte_sched_subport_params p;
971 u32 tc_rate[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE] =
973 u32 tc_period = (
u32) ~ 0;
985 else if (
unformat (line_input,
"subport %d", &subport_id))
987 else if (
unformat (line_input,
"rate %d", &tb_rate))
989 else if (
unformat (line_input,
"bktsize %d", &tb_size))
991 else if (
unformat (line_input,
"tc0 %d", &tc_rate[0]))
993 else if (
unformat (line_input,
"tc1 %d", &tc_rate[1]))
995 else if (
unformat (line_input,
"tc2 %d", &tc_rate[2]))
997 else if (
unformat (line_input,
"tc3 %d", &tc_rate[3]))
999 else if (
unformat (line_input,
"period %d", &tc_period))
1009 error =
get_hqos (hw_if_index, subport_id, &xd, &devconf);
1014 memcpy (&p, &devconf->
hqos.
subport[subport_id], sizeof (p));
1017 if (tb_rate != (
u32) ~ 0)
1019 p.tb_rate = tb_rate;
1020 p.tc_rate[0] = tb_rate;
1021 p.tc_rate[1] = tb_rate;
1022 p.tc_rate[2] = tb_rate;
1023 p.tc_rate[3] = tb_rate;
1025 if (tb_size != (
u32) ~ 0)
1027 p.tb_size = tb_size;
1029 if (tc_rate[0] != (
u32) ~ 0)
1031 p.tc_rate[0] = tc_rate[0];
1033 if (tc_rate[1] != (
u32) ~ 0)
1035 p.tc_rate[1] = tc_rate[1];
1037 if (tc_rate[2] != (
u32) ~ 0)
1039 p.tc_rate[2] = tc_rate[2];
1041 if (tc_rate[3] != (
u32) ~ 0)
1043 p.tc_rate[3] = tc_rate[3];
1045 if (tc_period != (
u32) ~ 0)
1047 p.tc_period = tc_period;
1051 rv = rte_sched_subport_config (xd->
hqos_ht->
hqos, subport_id, &p);
1060 memcpy (&devconf->
hqos.
subport[subport_id], &p, sizeof (p));
1087 .path =
"set dpdk interface hqos subport",
1088 .short_help =
"set dpdk interface hqos subport <interface> subport <subport_id> " 1089 "[rate <n>] [bktsize <n>] [tc0 <n>] [tc1 <n>] [tc2 <n>] [tc3 <n>] " 1104 u32 hw_if_index = (
u32) ~ 0;
1120 else if (
unformat (line_input,
"entry %d", &entry))
1122 else if (
unformat (line_input,
"tc %d", &tc))
1124 else if (
unformat (line_input,
"queue %d", &queue))
1134 if (hw_if_index == (
u32) ~ 0)
1144 if (tc >= RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE)
1149 if (queue >= RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS)
1169 int worker_thread_count = tr->
count;
1171 val = tc * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1172 for (i = 0; i < worker_thread_count; i++)
1204 .path =
"set dpdk interface hqos tctbl",
1205 .short_help =
"set dpdk interface hqos tctbl <interface> entry <map_val> tc <tc_id> queue <queue_id>",
1220 struct rte_eth_dev_info dev_info;
1221 struct rte_pci_device *pci_dev;
1225 u32 hw_if_index = (
u32) ~ 0;
1235 int worker_thread_count = tr->
count;
1243 u32 n_subports_per_port, n_pipes_per_subport, tctbl_size;
1257 else if (
unformat (line_input,
"id subport"))
1259 else if (
unformat (line_input,
"id pipe"))
1261 else if (
unformat (line_input,
"id tc"))
1263 else if (
unformat (line_input,
"id %d", &
id))
1265 else if (
unformat (line_input,
"offset %d", &offset))
1267 else if (
unformat (line_input,
"mask %llx", &mask))
1278 if (hw_if_index == (
u32) ~ 0)
1287 rte_eth_dev_info_get (xd->
port_id, &dev_info);
1293 vlib_pci_addr_t pci_addr;
1295 pci_addr.domain = pci_dev->addr.domain;
1296 pci_addr.bus = pci_dev->addr.bus;
1297 pci_addr.slot = pci_dev->addr.devid;
1298 pci_addr.function = pci_dev->addr.function;
1315 n_subports_per_port = devconf->
hqos.
port.n_subports_per_port;
1316 n_pipes_per_subport = devconf->
hqos.
port.n_pipes_per_subport;
1332 "(n_subports_per_port = %u)",
1333 n_subports_per_port);
1341 "(n_pipes_per_subport = %u)",
1342 n_pipes_per_subport);
1351 "(TC table size = %u)", tctbl_size);
1357 for (i = 0; i < worker_thread_count; i++)
1427 .path =
"set dpdk interface hqos pktfield",
1428 .short_help =
"set dpdk interface hqos pktfield <interface> id subport|pipe|tc offset <n> " 1447 u32 hw_if_index = (
u32) ~ 0;
1448 u32 profile_id, subport_id,
i;
1449 struct rte_eth_dev_info dev_info;
1450 struct rte_pci_device *pci_dev;
1473 if (hw_if_index == (
u32) ~ 0)
1482 rte_eth_dev_info_get (xd->
port_id, &dev_info);
1488 vlib_pci_addr_t pci_addr;
1490 pci_addr.domain = pci_dev->addr.domain;
1491 pci_addr.bus = pci_dev->addr.bus;
1492 pci_addr.slot = pci_dev->addr.devid;
1493 pci_addr.function = pci_dev->addr.function;
1522 cfg = &devconf->
hqos;
1535 " Packet field 0: slab position = %4u, slab bitmask = 0x%016llx (subport)",
1538 " Packet field 1: slab position = %4u, slab bitmask = 0x%016llx (pipe)",
1541 " Packet field 2: slab position = %4u, slab bitmask = 0x%016llx (tc)",
1544 " Packet field 2 tc translation table: ([Mapped Value Range]: tc/queue tc/queue ...)");
1547 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1548 tctbl[0] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1549 tctbl[0] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1550 tctbl[1] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1551 tctbl[1] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1552 tctbl[2] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1553 tctbl[2] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1554 tctbl[3] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1555 tctbl[3] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1556 tctbl[4] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1557 tctbl[4] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1558 tctbl[5] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1559 tctbl[5] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1560 tctbl[6] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1561 tctbl[6] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1562 tctbl[7] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1563 tctbl[7] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1564 tctbl[8] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1565 tctbl[8] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1566 tctbl[9] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1567 tctbl[9] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1568 tctbl[10] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1569 tctbl[10] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1570 tctbl[11] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1571 tctbl[11] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1572 tctbl[12] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1573 tctbl[12] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1574 tctbl[13] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1575 tctbl[13] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1576 tctbl[14] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1577 tctbl[14] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1578 tctbl[15] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1579 tctbl[15] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1582 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1583 tctbl[16] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1584 tctbl[16] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1585 tctbl[17] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1586 tctbl[17] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1587 tctbl[18] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1588 tctbl[18] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1589 tctbl[19] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1590 tctbl[19] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1591 tctbl[20] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1592 tctbl[20] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1593 tctbl[21] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1594 tctbl[21] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1595 tctbl[22] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1596 tctbl[22] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1597 tctbl[23] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1598 tctbl[23] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1599 tctbl[24] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1600 tctbl[24] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1601 tctbl[25] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1602 tctbl[25] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1603 tctbl[26] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1604 tctbl[26] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1605 tctbl[27] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1606 tctbl[27] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1607 tctbl[28] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1608 tctbl[28] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1609 tctbl[29] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1610 tctbl[29] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1611 tctbl[30] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1612 tctbl[30] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1613 tctbl[31] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1614 tctbl[31] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1617 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1618 tctbl[32] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1619 tctbl[32] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1620 tctbl[33] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1621 tctbl[33] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1622 tctbl[34] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1623 tctbl[34] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1624 tctbl[35] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1625 tctbl[35] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1626 tctbl[36] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1627 tctbl[36] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1628 tctbl[37] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1629 tctbl[37] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1630 tctbl[38] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1631 tctbl[38] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1632 tctbl[39] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1633 tctbl[39] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1634 tctbl[40] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1635 tctbl[40] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1636 tctbl[41] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1637 tctbl[41] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1638 tctbl[42] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1639 tctbl[42] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1640 tctbl[43] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1641 tctbl[43] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1642 tctbl[44] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1643 tctbl[44] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1644 tctbl[45] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1645 tctbl[45] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1646 tctbl[46] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1647 tctbl[46] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1648 tctbl[47] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1649 tctbl[47] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1652 "%u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u %u/%u",
1653 tctbl[48] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1654 tctbl[48] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1655 tctbl[49] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1656 tctbl[49] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1657 tctbl[50] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1658 tctbl[50] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1659 tctbl[51] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1660 tctbl[51] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1661 tctbl[52] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1662 tctbl[52] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1663 tctbl[53] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1664 tctbl[53] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1665 tctbl[54] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1666 tctbl[54] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1667 tctbl[55] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1668 tctbl[55] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1669 tctbl[56] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1670 tctbl[56] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1671 tctbl[57] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1672 tctbl[57] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1673 tctbl[58] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1674 tctbl[58] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1675 tctbl[59] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1676 tctbl[59] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1677 tctbl[60] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1678 tctbl[60] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1679 tctbl[61] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1680 tctbl[61] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1681 tctbl[62] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1682 tctbl[62] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1683 tctbl[63] / RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS,
1684 tctbl[63] % RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS);
1689 cfg->
port.frame_overhead);
1691 cfg->
port.n_subports_per_port);
1693 cfg->
port.n_pipes_per_subport);
1695 " Packet queue size: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u packets",
1696 cfg->
port.qsize[0], cfg->
port.qsize[1], cfg->
port.qsize[2],
1697 cfg->
port.qsize[3]);
1699 cfg->
port.n_pipe_profiles);
1701 for (subport_id = 0; subport_id <
vec_len (cfg->
subport); subport_id++)
1705 cfg->
subport[subport_id].tb_rate);
1707 cfg->
subport[subport_id].tb_size);
1709 " Traffic class rate: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u bytes/second",
1710 cfg->
subport[subport_id].tc_rate[0],
1711 cfg->
subport[subport_id].tc_rate[1],
1712 cfg->
subport[subport_id].tc_rate[2],
1713 cfg->
subport[subport_id].tc_rate[3]);
1715 cfg->
subport[subport_id].tc_period);
1718 for (profile_id = 0; profile_id <
vec_len (cfg->
pipe); profile_id++)
1722 cfg->
pipe[profile_id].tb_rate);
1724 cfg->
pipe[profile_id].tb_size);
1726 " Traffic class rate: TC0 = %u, TC1 = %u, TC2 = %u, TC3 = %u bytes/second",
1727 cfg->
pipe[profile_id].tc_rate[0],
1728 cfg->
pipe[profile_id].tc_rate[1],
1729 cfg->
pipe[profile_id].tc_rate[2],
1730 cfg->
pipe[profile_id].tc_rate[3]);
1732 cfg->
pipe[profile_id].tc_period);
1733 #ifdef RTE_SCHED_SUBPORT_TC_OV 1735 cfg->
pipe[profile_id].tc_ov_weight);
1738 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
1741 " TC%u WRR weights: Q0 = %u, Q1 = %u, Q2 = %u, Q3 = %u",
1742 i, cfg->
pipe[profile_id].wrr_weights[i * 4],
1743 cfg->
pipe[profile_id].wrr_weights[i * 4 + 1],
1744 cfg->
pipe[profile_id].wrr_weights[i * 4 + 2],
1745 cfg->
pipe[profile_id].wrr_weights[i * 4 + 3]);
1749 #ifdef RTE_SCHED_RED 1751 for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
1754 cfg->
port.red_params[i][e_RTE_METER_GREEN].min_th,
1755 cfg->
port.red_params[i][e_RTE_METER_YELLOW].min_th,
1756 cfg->
port.red_params[i][e_RTE_METER_RED].min_th);
1759 cfg->
port.red_params[i][e_RTE_METER_GREEN].max_th,
1760 cfg->
port.red_params[i][e_RTE_METER_YELLOW].max_th,
1761 cfg->
port.red_params[i][e_RTE_METER_RED].max_th);
1764 " TC%u inverted probability: G = %u, Y = %u, R = %u",
1765 i, cfg->
port.red_params[i][e_RTE_METER_GREEN].maxp_inv,
1766 cfg->
port.red_params[i][e_RTE_METER_YELLOW].maxp_inv,
1767 cfg->
port.red_params[i][e_RTE_METER_RED].maxp_inv);
1770 cfg->
port.red_params[i][e_RTE_METER_GREEN].wq_log2,
1771 cfg->
port.red_params[i][e_RTE_METER_YELLOW].wq_log2,
1772 cfg->
port.red_params[i][e_RTE_METER_RED].wq_log2);
1827 .path =
"show dpdk interface hqos",
1828 .short_help =
"show dpdk interface hqos <interface>",
1840 #ifdef RTE_SCHED_COLLECT_STATS 1842 u32 hw_if_index = (
u32) ~ 0;
1850 struct rte_eth_dev_info dev_info;
1853 struct rte_sched_queue_stats stats;
1866 else if (
unformat (line_input,
"subport %d", &subport))
1869 else if (
unformat (line_input,
"pipe %d", &pipe))
1872 else if (
unformat (line_input,
"tc %d", &tc))
1875 else if (
unformat (line_input,
"tc_q %d", &tc_q))
1886 if (hw_if_index == (
u32) ~ 0)
1895 rte_eth_dev_info_get (xd->
port_id, &dev_info);
1896 if (dev_info.pci_dev)
1898 vlib_pci_addr_t pci_addr;
1900 pci_addr.domain = dev_info.pci_dev->addr.domain;
1901 pci_addr.bus = dev_info.pci_dev->addr.bus;
1902 pci_addr.slot = dev_info.pci_dev->addr.devid;
1903 pci_addr.function = dev_info.pci_dev->addr.function;
1914 if (devconf->hqos_enabled == 0)
1924 qindex = subport * devconf->hqos.port.n_pipes_per_subport + pipe;
1925 qindex = qindex * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + tc;
1926 qindex = qindex * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + tc_q;
1928 if (rte_sched_queue_read_stats (xd->
hqos_ht->
hqos, qindex, &stats, &qlen) !=
1937 vlib_cli_output (vm,
"%=24s%=16d",
"Packets dropped", stats.n_pkts_dropped);
1938 #ifdef RTE_SCHED_RED 1940 stats.n_pkts_red_dropped);
1943 vlib_cli_output (vm,
"%=24s%=16d",
"Bytes dropped", stats.n_bytes_dropped);
1983 .path =
"show dpdk hqos queue",
1984 .short_help =
"show dpdk hqos queue <interface> subport <subport_id> pipe <pipe_id> tc <tc_id> tc_q <queue_id>",
1994 #define _(a,b,c) vlib_cli_output (vm, "%-25s " b, a ":", c); 1995 _(
"DPDK Version",
"%s", rte_version ());
2014 .path =
"show dpdk version",
2015 .short_help =
"show dpdk version",
2026 u32 n_invalid_bufs = 0, uninitialized = 0;
2027 u32 is_poison = 0, is_test = 0;
2032 else if (
unformat (input,
"trajectory"))
2042 "VLIB_BUFFER_TRACE_TRAJECTORY 1");
2047 dpdk_buffer_poison_trajectory_all ();
2051 n_invalid_bufs = dpdk_buffer_validate_trajectory_all (&uninitialized);
2052 if (!n_invalid_bufs)
2057 n_invalid_bufs, uninitialized);
2065 .path =
"test dpdk buffers",
2066 .short_help =
"test dpdk buffers [poison] [trajectory]",
2067 .function = dpdk_validate_buffers_fn,
unformat_function_t unformat_vnet_hw_interface
#define vec_validate(V, I)
Make sure vector is long enough for given index (no header, unspecified alignment) ...
char * file_name
File name of pcap output.
static clib_error_t * set_dpdk_if_hqos_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static void vlib_buffer_free(vlib_main_t *vm, u32 *buffers, u32 n_buffers)
Free buffers Frees the entire buffer chain for each buffer.
u32 n_packets_to_capture
Number of packets to capture.
static clib_error_t * set_dpdk_if_desc(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
int dpdk_hqos_validate_mask(u64 mask, u32 n)
static clib_error_t * show_dpdk_if_hqos(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
struct rte_pci_device * dpdk_get_pci_device(const struct rte_eth_dev_info *info)
static vnet_hw_interface_t * vnet_get_hw_interface(vnet_main_t *vnm, u32 hw_if_index)
static clib_error_t * get_hqos(u32 hw_if_index, u32 subport_id, dpdk_device_t **xd, dpdk_device_config_t **devconf)
static clib_error_t * pcap_rx_trace_command_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_add1(V, E)
Add 1 element to end of vector (unspecified alignment).
dpdk_device_and_queue_t ** devices_by_hqos_cpu
static clib_error_t * set_dpdk_if_hqos_pipe(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_add2(V, P, N)
Add N elements to end of vector V, return pointer to new elements in P.
struct rte_sched_port_params port
static clib_error_t * show_dpdk_hqos_queue_stats(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
struct rte_sched_port * hqos
unformat_function_t unformat_vnet_sw_interface
dpdk_device_config_hqos_t hqos
static clib_error_t * pcap_trace_command_internal(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd, int rx_tx)
format_function_t format_vnet_sw_if_index_name
#define count_trailing_zeros(x)
static clib_error_t * show_dpdk_buffer(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
struct rte_sched_pipe_params * pipe
clib_spinlock_t lock
spinlock to protect e.g.
#define VLIB_INIT_FUNCTION(x)
dpdk_config_main_t dpdk_config_main
dpdk_device_config_t default_devconf
static clib_error_t * pcap_tx_trace_command_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_elt_at_index(v, i)
Get vector value at index i checking that i is in bounds.
#define clib_error_return(e, args...)
#define vec_resize(V, N)
Resize a vector (no header, unspecified alignment) Add N elements to end of given vector V...
void dpdk_device_setup(dpdk_device_t *xd)
static clib_error_t * test_dpdk_buffer(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
dpdk_device_hqos_per_worker_thread_t * hqos_wt
static void clib_spinlock_init(clib_spinlock_t *p)
static heap_elt_t * first(heap_header_t *h)
vlib_worker_thread_t * vlib_worker_threads
#define pool_elt_at_index(p, i)
Returns pointer to element at given index.
#define clib_error_return_unix(e, args...)
#define vec_del1(v, i)
Delete the element at index I.
clib_error_t * clib_sysfs_read(char *file_name, char *fmt,...)
static clib_error_t * show_dpdk_physmem(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static int dpdk_device_queue_sort(void *a1, void *a2)
static clib_error_t * set_dpdk_if_hqos_tctbl(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_free(V)
Free vector's memory (no header).
dpdk_device_config_t * dev_confs
#define VLIB_BUFFER_TRACE_TRAJECTORY
Compile time buffer trajectory tracing option Turn this on if you run into "bad monkey" contexts...
format_function_t format_dpdk_device_errors
clib_error_t * pcap_write(pcap_main_t *pm)
Write PCAP file.
#define VLIB_CLI_COMMAND(x,...)
struct rte_mempool ** pktmbuf_pools
dpdk_device_hqos_per_hqos_thread_t * hqos_ht
#define clib_error_report(e)
uword * thread_registrations_by_name
clib_error_t * dpdk_cli_init(vlib_main_t *vm)
dpdk_portid_t device_index
static clib_error_t * set_dpdk_if_hqos_subport(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define PCAP_DEF_PKT_TO_CAPTURE
template key/value backing page structure
pcap_packet_type_t packet_type
Packet type.
#define vec_len(v)
Number of elements in vector (rvalue-only, NULL tolerant)
static clib_error_t * set_dpdk_if_hqos_pktfield(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
#define vec_sort_with_function(vec, f)
Sort a vector using the supplied element comparison function.
dpdk_pcap_t pcap[VLIB_N_RX_TX]
#define hash_get_mem(h, key)
struct clib_bihash_value offset
template key/value backing page structure
static vlib_thread_main_t * vlib_get_thread_main()
struct rte_sched_subport_params * subport
#define vec_foreach(var, vec)
Vector iterator.
static clib_error_t * show_dpdk_version_command_fn(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
static u32 vlib_buffer_alloc(vlib_main_t *vm, u32 *buffers, u32 n_buffers)
Allocate buffers into supplied array.
void vlib_cli_output(vlib_main_t *vm, char *fmt,...)
uword * device_config_index_by_pci_addr
u32 n_packets_captured
Number of packets currently captured.
static clib_error_t * show_dpdk_if_hqos_placement(vlib_main_t *vm, unformat_input_t *input, vlib_cli_command_t *cmd)
CLIB vectors are ubiquitous dynamically resized arrays with by user defined "headers".
dpdk_config_main_t * conf